M24

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  1. hello, The Zybo Z7 has 2 HDMI ports, RX and TX. On the Zybo you had one port which could serve as input or output. Since the PHY is still implemented in the FPGA I wonder what the advantages are with this change, because before you could have set the ports as input or output as you like.
  2. hello, I used the zybo_hdmi_in as reference for my project. I struggled with the VDMA. After some modifications (added image sensor as input) It seems so I have my program code overlapping with the DDR memory of my frame buffer. I found that my design works once I added an offset to the DDR_0_BASEADDRess. Without the offset the VDMA gives an address encoding error. I increased the offset until it works. Now, the printf's are no longer showing... Looking into UG585 (TRM) the VDMA is definetely within the address range 0010_0000 to 3FFF_FFFF and there seem no overlap. Can anyone suggest me a good document where I can learn more about Zynq memory mapping, and observe problems like stack overflow etc? thanks