joniengr081

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About joniengr081

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  1. Hi, Thanks for sharing the project. It works. There is nothing wrong in the tutorial. No need to change anything this the SDK program. The problem was in connecting to Tera Term. There was also some operating system problem which is fixed now. I am sorry for this redundant post. Kindly advice if there is any way to improve or maybe delete this post. Thanks for understanding.
  2. Hi, I am using JTAG to download the program. I am following the steps in tutorial. The UART serial terminal output you can see in the first post. How to attach screen shots ? I don't find option to upload a file.
  3. Yes I have added the board files of Zybo-Z7-20 and have implemented several projects on it including AXI DMA with AXI Stream interface. The projects works with JTAG programing and also with BOOT.BIN in SD card. As mentioned above that I have followed the steps in the Digilent's tutorial "Getting Started with Zynq Servers" which was implemented on Xilinx Vivado 2015.X. I am implementing the LwIP project using Vivado 2017.3. I am using Tera Term for connecting to UART. I get the warning message on UART that the PHY is not Marvel or TI. This is the only difference which I have until step 11 of Digilent's tutorial. The issue is with last step 12. Repeat: I have assigned the IPv4 address (192.168.1.11) in the laptop and have connected the Ethernet cable. I am not able to ping the board (192.168.1.10) and not able to connect to Telnet which is demonstrated in step 12 of tutorial. Is it possible to attach file ? I don't find the option to upload the files.
  4. Yes I have already looked into this tutorial and I have followed until step 11 which is a message on UART, posted in the first post. Then I have issue with step 12. I have assigned the IPv4 address (192.168.1.11) in the laptop and have connected the Ethernet cable. I am not able to ping the board (192.168.1.10) and not able to connect to Telnet which is demonstrated in step 12 of tutorial.
  5. I am trying to run the ZYNQ server LwIP example on ZYBO Z7-20. The board has Realtek RTL8211E-VL PHY. The LwIP example in Vivado SKD 2017.3 is designed for TI or Micrel PHY. I get warning (and also DHCP timeout) in the UART terminal that the PHY on target board is not TI or Micrel PHY. -----lwIP TCP echo server ------ TCP packets sent to port 6001 will be echoed back WARNING: Not a Marvell or TI Ethernet PHY. Please verify the initialization sequence link speed for phy address 1: 1000 DHCP Timeout Configuring default IP of 192.168.1.10 Board IP: 192.168.1.10 Netmask : 255.255.255.0 Gateway : 192.168.1.1 TCP echo server started @ port 7 I have looked at the Digilent's tutorial "Getting Started with Zynq Servers" which was implemented on Xilinx Vivado 2015.X. Probably the LwIP example in Vivado 2015 is compatible with ZYBO's Realtek RTL8211E-VL. Do I need to change any setting in LwIP example in Vivado 2017.3 to run on ZYBO Z7-20 ?
  6. Hi, I am working on an application in which I need to send data continuously to the network from zybo. I have looked at the Echo server example but it is sensitive to the listening mode. It listen to the network all the time. It send data to network whenever there is data from the network to the zynq otherwise zynq don't send anything to network. My task is to send 32 bit of data upon every micro-second from zynq to PC over ethernet. Is there anything better and recommended other then LwIP for my application ? I am not sure which function in the main () I need to modify in LwIP. Here is the section of the main (). print_ip_settings(&ipaddr, &netmask, &gw); /* start the application (web server, rxtest, txtest, etc..) */ start_application(); /* receive and process packets */ while (1) { if (TcpFastTmrFlag) { tcp_fasttmr(); TcpFastTmrFlag = 0; } if (TcpSlowTmrFlag) { tcp_slowtmr(); TcpSlowTmrFlag = 0; } xemacif_input(echo_netif); transfer_data(); }