sLowe

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  1. Like
    sLowe got a reaction from jpeyron in DDR3 Usage   
    Hi Blueshark,
    This page may also be useful https://reference.digilentinc.com/learn/programmable-logic/tutorials/nexys-4-ddr-sram-to-ddr-component/start?s[]=ram2ddr
    This is the module that the looper demo that Jon referenced uses. (Hi Jon!) It may need some adjusting since its the arty but I'm not sure.
    -Sam
  2. Like
    sLowe reacted to jpeyron in Cmod A7 Clocking   
    Hi @etownsend,
    There is the option of adding a 100 MHz oscillator to the Cmod A7.  Here is a forum thread that discusses this option. The oscillator would be added to IC4. You can see this in the schematic here on the bottom of page 3.  This is a more complicated processes and requires removing R80 along with adding the oscillator to IC4. I would not suggest this option.  The other two suggestions @sLowe referred to are different ways to generate a 100 MHz clock one using the Xilinx Clocking wizard here(my suggestion as well). The other is referring to @D@n suggestion of using a PLL(phase-locked loop) to generate a 100 MHz clock. Here is another forum thread that discusses generating a different clock using MMCM dynamic clocking(a much more complicated way).
    cheers,
    Jon 
  3. Like
    sLowe reacted to D@n in nexys video board DDR3 Vivado Project   
    @jpeyron,
    You realize a simple README.md file describing what each project is and what it is supposed to do would go a long way to making your github site more navigable?

    Dan
  4. Like
    sLowe got a reaction from jpeyron in Program Zybo board QSPI FLASH with .mcs file   
    Hey Diya,
    Sorry if this is late, but it sounds like your jumper is not in the correct position? In section 3.2 of the Reference Manual  here, it shows you what to set it as. The manual also references a project that can take you through the process. That can be downloaded on the resource center page or here. base system design
    -Sam
  5. Like
    sLowe got a reaction from jpeyron in XADC demo   
    Just as a follow up I made a BCD controller out to ten digits that can be found here.
    https://gist.github.com/SamKLowe/b126dd6f2e77bb31e3235c6e588c5c0a
     
  6. Like
    sLowe got a reaction from Manas in XADC demo   
    Yea I think there may have been a more clear way to do that math. Maybe I'll add a comment above that line. In the project I do the multiply before shifting right which avoids the two bit precision which would be a big problem. 
    Also in the project is the gross /10, &10 chain that calculates the decimal values but that will throw timing errors. I think what needs to be done is some sort of BCD conversion to evaluate those digits faster. Or spread the process over multiple clock cycles since the display doesn't need to be updated as fast as values are coming in.
    -Sam
  7. Like
    sLowe got a reaction from Billel in How to get a negative value with PMODAD1   
    Hey Billel,
    Unfortunately looking the datasheet  of the AD here, it looks like it does not have a bi polar mode. However since your signal has a peak to peak value of 2, you can bias its ground to 1 V. So your sin wave signal should look like a sin wave going from 0 to 2V. Then in your logic you can subtract 1 V from all of your reading to receive negative values. 
    Since you are working with the basys you could also use the XADC core which has a bipolar mode if you are not attached to the PmodAD1. However you will again need to transform your input to have a peak to peak voltage of 1 V.
    - Sam
  8. Like
    sLowe reacted to jamey.hicks in Can I program zybo in PS and PL?   
    It sounds like you want a BRAM FIFO rather than a BRAM.
  9. Like
    sLowe got a reaction from JColvin in FMC-CE: Basic Input/Output Expansion Board   
    Hello,
    This board will connect to the nexys video. It was designed with the Zedboard in mind which uses the same FMC port as the video. For some more piece of mind you can look at the schematics and see that the FMC ports are of the same part and connection. (part  ASP-134603)
    https://reference.digilentinc.com/_media/reference/programmable-logic/zedboard/zedboard_sch.pdf
    https://reference.digilentinc.com/_media/reference/programmable-logic/nexys-video/nexys_video_sch.pdf
    - Sam
  10. Like
    sLowe got a reaction from dr_b in Arty bsd project won't run Bitgen in Vivado 2015.4   
    I believe these delays are just for simulation purposes. The warnings are basically saying you haven't specified your input and output delays to the real world so a system that works in theory may not work on the board.
    I have successfully ignored them in the past if I am wrong about that.
    -Sam
  11. Like
    sLowe reacted to chy520cvv in ERROR with PmodOLED IP and Vivado Board File   
    thx for replying. the ERROR I have corrrected. because the IP directory should be set as the root directory.
  12. Like
    sLowe reacted to D@n in XADC demo   
    @Manas,
    Sam is trying to turn voltage = (12-bit-code)/4096 into microvolts = (1000)*(1000)*(12-bit-code)/4096, and he's trying to avoid division.  Rearranging:
    1000*1000/4096 = 500*500/1024 (just by dropping common factors of two from both numerator and denominator)
    Shifting right by ten is equivalent to dividing by 1024, and then he multiplies by 500*500.  Looks like it works alright.
    I might be concerned personally about losing any precision in the divide by 1024 (i.e. shift right by 10), especially since it is being done before the multiply if I understand correctly--leaving you with only 2-bits of precision (did I read that right?).  Looking at the above, you might simplify it further into a shift right by 6, followed by a multiply of 15625.  To get here, all I did was cancel out any factors of two that were in both the numerator and denominator.  Then --- rearrange your order of operations, so the multiply is done first.  What makes this choice special is that 15625 can fit within an 18-bit multiplier.  Hence you can do:
    A = 15625*(12-bit-voltage-code)
    inside a DSP multiplier, and hence inside one clock.  The result of this multiply will be a 30-bit number.  If you ignore the bottom six bits, the 24-bit number that remains will be the number of microvolts that you are looking for.
    Converting this to a decimal display might take some more work though. 
    Dan
  13. Like
    sLowe got a reaction from Manas in XADC demo   
    I would do your comparison in binary since you can use non floating point numbers. This will allow the tools to do a simple binary comparison which should be faster.
     I am pretty sure the timing error stems from the /10 %10 logic used to decipher the digits to send to the display. I didn't see the timing error as a huge issue since my eyes cant realize an error and nothing else is calculated off of those values.
     
    I think you are getting zeroes because you instantiate voltage as a reg, any reading you get divided by 4096 = 0. You either need to pull some verilog trickiness to allow these decimal numbers or do what I did and only shift right 10 (/1024)  and multiplying it by 250000 gets you your  voltage = (12-bit_ADC_code/4096)*100000. This gave me the voltage in microvolts
    Also your .5 sin wave should be biased at .5 V to start with. Your wave should still have a range of 0 to 1 with .5 being your virtual reference. I would expect that you would still see half of the wave(positive half) with this method though.
    -Sam
  14. Like
    sLowe got a reaction from Manas in XADC demo   
    Also I'm guessing you are getting that issue from not selecting channel 11 in the IP wizard under the channel sequencer tab. You need to make sure they are checked and under the basic tab you need to select Channel sequencer
     
  15. Like
    sLowe reacted to pjcoleman52 in Why can't SDK and Terminal both work together?   
    Well it appears that the answer to my problem .... like a lot of these things was really quite simple.......
    There should be two COM ports when the ZYBO is attached via the USB cable to the PROG/UART port.
    To solve my problem I navigated to the /<vivado installation>/data/xicom/cable_drivers/nt64/digilent/
    and clicked on the install_digilent application.
    I ignored the prompt that told me it was already installed and up to date and re-installed it.
    So when i plugged the ZYBO USB cable in then Windows installed the drivers and a second COM port appeared. ( COM4 + COM5 )
    I opened VIVADO and SDK nd connected a terminal to COM5.
    Ran the software and .....got that magical phrase "Hello World" in the terminal window.
    So problem solved.
    Now in my more complex tutorial ... using the FPGA to connect to the buttons ... this works too.
    Finally I can proceed with the real work. ;-))))))
    All the best
    Patrick
  16. Like
    sLowe got a reaction from LariSan in replace Nexys2 with Nexys4?   
    Hey dCas,
    You should be able to closely follow that pdf with the Nexys 4. The main differences will be the part in the project settings and the UCF file used with the Nexys 4. Other than those two things, you should be able to recreate all of those projects. On top of that there is some more room for expansion since the Nexys 4 has 2 7 seg displays and more switches and leds. 
    Using the Nexys 4 also opens you up to using Vivado however that wouldn't follow very closely with the PDF's when it comes to simulation and programming. I've personally found Vivado to be a little easier to pick up than ISE. (simulator and hardware programmer are integrated)
    Ill keep an eye out to see if you have any more concerns.
    -Sam
  17. Like
    sLowe got a reaction from yngndrw in Nexys 3 - Replacement Parts   
    Hey Andrew,
    Looks like that is the part from ON Semiconductor listed below
    NSQA6V8 SOT-323-5
    Here is a link to digikey http://www.digikey.com/product-detail/en/on-semiconductor/NSQA6V8AW5T2G/NSQA6V8AW5T2GOSCT-ND/1967247
    For packaging, I'm pretty sure SOT-323-5 is the same as SOT-353. 
    https://en.wikipedia.org/wiki/Small-outline_transistor
    Hope this helps!
    -Sam
     
  18. Like
    sLowe got a reaction from Manas in XADC demo   
    Hey I think you are really close. Try using this .xdc in your project. My project is working now with this xdc. If you are getting .12 that seems to be the floating value. The project uses switches to select the channel. ad11 is connected to the display when sw0 and sw1 are both up. 
    I will also reupload the project to the wiki. Thanks for the catch!
    -Sam
    # Clock signal #Bank = 35, Pin name = IO_L12P_T1_MRCC_35, Sch name = CLK100MHZ set_property PACKAGE_PIN E3 [get_ports CLK100MHZ] set_property IOSTANDARD LVCMOS33 [get_ports CLK100MHZ] create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports CLK100MHZ] # Switches #Bank = 34, Pin name = IO_L21P_T3_DQS_34, Sch name = SW0 set_property PACKAGE_PIN U9 [get_ports {sw[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}] #Bank = 34, Pin name = IO_25_34, Sch name = SW1 set_property PACKAGE_PIN U8 [get_ports {sw[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}] # LEDs #Bank = 34, Pin name = IO_L24N_T3_34, Sch name = LED0 set_property PACKAGE_PIN T8 [get_ports {led[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[0]}] #Bank = 34, Pin name = IO_L21N_T3_DQS_34, Sch name = LED1 set_property PACKAGE_PIN V9 [get_ports {led[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[1]}] #Bank = 34, Pin name = IO_L24P_T3_34, Sch name = LED2 set_property PACKAGE_PIN R8 [get_ports {led[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[2]}] #Bank = 34, Pin name = IO_L23N_T3_34, Sch name = LED3 set_property PACKAGE_PIN T6 [get_ports {led[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[3]}] #Bank = 34, Pin name = IO_L12P_T1_MRCC_34, Sch name = LED4 set_property PACKAGE_PIN T5 [get_ports {led[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[4]}] #Bank = 34, Pin name = IO_L12N_T1_MRCC_34, Sch name = LED5 set_property PACKAGE_PIN T4 [get_ports {led[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[5]}] #Bank = 34, Pin name = IO_L22P_T3_34, Sch name = LED6 set_property PACKAGE_PIN U7 [get_ports {led[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[6]}] #Bank = 34, Pin name = IO_L22N_T3_34, Sch name = LED7 set_property PACKAGE_PIN U6 [get_ports {led[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[7]}] #Bank = 34, Pin name = IO_L10N_T1_34, Sch name = LED8 set_property PACKAGE_PIN V4 [get_ports {led[8]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[8]}] #Bank = 34, Pin name = IO_L8N_T1_34, Sch name = LED9 set_property PACKAGE_PIN U3 [get_ports {led[9]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[9]}] #Bank = 34, Pin name = IO_L7N_T1_34, Sch name = LED10 set_property PACKAGE_PIN V1 [get_ports {led[10]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[10]}] #Bank = 34, Pin name = IO_L17P_T2_34, Sch name = LED11 set_property PACKAGE_PIN R1 [get_ports {led[11]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[11]}] #Bank = 34, Pin name = IO_L13N_T2_MRCC_34, Sch name = LED12 set_property PACKAGE_PIN P5 [get_ports {led[12]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[12]}] #Bank = 34, Pin name = IO_L7P_T1_34, Sch name = LED13 set_property PACKAGE_PIN U1 [get_ports {led[13]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[13]}] #Bank = 34, Pin name = IO_L15N_T2_DQS_34, Sch name = LED14 set_property PACKAGE_PIN R2 [get_ports {led[14]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[14]}] #Bank = 34, Pin name = IO_L15P_T2_DQS_34, Sch name = LED15 set_property PACKAGE_PIN P2 [get_ports {led[15]}] set_property IOSTANDARD LVCMOS33 [get_ports {led[15]}] #7 segment display #Bank = 34, Pin name = IO_L2N_T0_34, Sch name = CA set_property PACKAGE_PIN L3 [get_ports {seg[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[0]}] #Bank = 34, Pin name = IO_L3N_T0_DQS_34, Sch name = CB set_property PACKAGE_PIN N1 [get_ports {seg[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[1]}] #Bank = 34, Pin name = IO_L6N_T0_VREF_34, Sch name = CC set_property PACKAGE_PIN L5 [get_ports {seg[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[2]}] #Bank = 34, Pin name = IO_L5N_T0_34, Sch name = CD set_property PACKAGE_PIN L4 [get_ports {seg[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[3]}] #Bank = 34, Pin name = IO_L2P_T0_34, Sch name = CE set_property PACKAGE_PIN K3 [get_ports {seg[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[4]}] #Bank = 34, Pin name = IO_L4N_T0_34, Sch name = CF set_property PACKAGE_PIN M2 [get_ports {seg[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[5]}] #Bank = 34, Pin name = IO_L6P_T0_34, Sch name = CG set_property PACKAGE_PIN L6 [get_ports {seg[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {seg[6]}] #Bank = 34, Pin name = IO_L16P_T2_34, Sch name = DP set_property PACKAGE_PIN M4 [get_ports dp] set_property IOSTANDARD LVCMOS33 [get_ports dp] #Bank = 34, Pin name = IO_L18N_T2_34, Sch name = AN0 set_property PACKAGE_PIN N6 [get_ports {an[0]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[0]}] #Bank = 34, Pin name = IO_L18P_T2_34, Sch name = AN1 set_property PACKAGE_PIN M6 [get_ports {an[1]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[1]}] #Bank = 34, Pin name = IO_L4P_T0_34, Sch name = AN2 set_property PACKAGE_PIN M3 [get_ports {an[2]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[2]}] #Bank = 34, Pin name = IO_L13_T2_MRCC_34, Sch name = AN3 set_property PACKAGE_PIN N5 [get_ports {an[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[3]}] #Bank = 34, Pin name = IO_L3P_T0_DQS_34, Sch name = AN4 set_property PACKAGE_PIN N2 [get_ports {an[4]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[4]}] #Bank = 34, Pin name = IO_L16N_T2_34, Sch name = AN5 set_property PACKAGE_PIN N4 [get_ports {an[5]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[5]}] #Bank = 34, Pin name = IO_L1P_T0_34, Sch name = AN6 set_property PACKAGE_PIN L1 [get_ports {an[6]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[6]}] #Bank = 34, Pin name = IO_L1N_T034, Sch name = AN7 set_property PACKAGE_PIN M1 [get_ports {an[7]}] set_property IOSTANDARD LVCMOS33 [get_ports {an[7]}] #Pmod Header JXADC #Bank = 15, Pin name = IO_L9P_T1_DQS_AD3P_15, Sch name = XADC1_P -> XA1_P set_property PACKAGE_PIN A13 [get_ports {vauxp3}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxp3}] #Bank = 15, Pin name = IO_L8P_T1_AD10P_15, Sch name = XADC2_P -> XA2_P set_property PACKAGE_PIN A15 [get_ports {vauxp10}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxp10}] #Bank = 15, Pin name = IO_L7P_T1_AD2P_15, Sch name = XADC3_P -> XA3_P set_property PACKAGE_PIN B16 [get_ports {vauxp2}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxp2}] #Bank = 15, Pin name = IO_L10P_T1_AD11P_15, Sch name = XADC4_P -> XA4_P set_property PACKAGE_PIN B18 [get_ports {vauxp11}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxp11}] #Bank = 15, Pin name = IO_L9N_T1_DQS_AD3N_15, Sch name = XADC1_N -> XA1_N set_property PACKAGE_PIN A14 [get_ports {vauxn3}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxn3}] #Bank = 15, Pin name = IO_L8N_T1_AD10N_15, Sch name = XADC2_N -> XA2_N set_property PACKAGE_PIN A16 [get_ports {vauxn10}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxn10}] #Bank = 15, Pin name = IO_L7N_T1_AD2N_15, Sch name = XADC3_N -> XA3_N set_property PACKAGE_PIN B17 [get_ports {vauxn2}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxn2}] #Bank = 15, Pin name = IO_L10N_T1_AD11N_15, Sch name = XADC4_N -> XA4_N set_property PACKAGE_PIN A18 [get_ports {vauxn11}] set_property IOSTANDARD LVCMOS33 [get_ports {vauxn11}]  
  19. Like
    sLowe got a reaction from Manas in XADC demo   
    Its ok to use them as single ended pins but AD11N needs to be wired to ground. But it seems like your not getting your signal tied to the xadc core. In your xdc make sure your uncommented xadc lines match the ones below. 
    set_property -dict { PACKAGE_PIN A18   IOSTANDARD LVCMOS33     } [get_ports { vauxn11 }]; #IO_L10N_T1_AD11N_15 Sch=xa_n[4]
    set_property -dict { PACKAGE_PIN B18   IOSTANDARD LVCMOS33     } [get_ports { vauxp11 }]; #IO_L10P_T1_AD11P_15 Sch=xa_p[4]
    A quick check to see if the rest of the project is working is to make the "data" wire a reg and set it to a value not zero. This should cause the seven segment and leds to display something else upon startup. 
    Ill try to build the project here shortly
    -Sam
  20. Like
    sLowe got a reaction from Manas in XADC demo   
    Hey Manas,
    I think you don't have the correct analog channel. The demo is set up to run on the channel AD11 which would be pin column 4  on the XADC header, No lights or display is also weird since a floating value should not pass a straight zero. Does your seven segment display light up at all? (showing all zeros)
    -Sam
  21. Like
    sLowe got a reaction from Bianca in replace Nexys2 with Nexys4?   
    Hey dCas,
    You should be able to closely follow that pdf with the Nexys 4. The main differences will be the part in the project settings and the UCF file used with the Nexys 4. Other than those two things, you should be able to recreate all of those projects. On top of that there is some more room for expansion since the Nexys 4 has 2 7 seg displays and more switches and leds. 
    Using the Nexys 4 also opens you up to using Vivado however that wouldn't follow very closely with the PDF's when it comes to simulation and programming. I've personally found Vivado to be a little easier to pick up than ISE. (simulator and hardware programmer are integrated)
    Ill keep an eye out to see if you have any more concerns.
    -Sam
  22. Like
    sLowe got a reaction from Axe in How to use Audio on Zybo board   
    Weird my project seems to be playing in both earphones when I record music from my computer into the line in port and play it out. A couple things to check though.
    Is your input audio stereo?
    If you are using the mic input that is only mono
     
  23. Like
    sLowe got a reaction from steveyoon77 in Can PmodI2S play 4/8/16KHz 16-bit stereo audio?   
    The PmodI2S was built to sample at 48 or 96 kHz so if you don't mind oversampling a bit, there should be no problems. 24 and 16 bit audio should work fine.
    Also you can drive the serial clock at 4/8/16 kHz and virtually sample at those rates.
    -Sam
     
  24. Like
    sLowe got a reaction from Commanderfranz in adc embeded in board   
    Hey Moez,
    All of our Artix-7 and Zynq boards have this capability through the xadc embedded on the FPGA. Here is a link to the XADC datasheet. http://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf 
    If this satisfies your requirements, one of the xadc reference projects located on our wiki would be a good place to start.
    This is for the basys 3 https://reference.digilentinc.com/basys3:xadcdemo
    -Sam
  25. Like
    sLowe got a reaction from Commanderfranz in MUX 2x1 using VHDL   
    Hey Jaiko,
    On top of this module I would use the clocking ip wizard to generate these two frequencies. Once you do this, you can feed the two clocks into your mux. However, you may get some critical warnings about logic on clocks but since you are using them for PWM and not actual clocking, this should not affect your design. 
    Hope this helps a bit!