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Posted August 22, 2019
Edited August 23, 2019 by CKV
Posted March 25, 2018
I have upgraded the PMOD IP's for Virtex ultra scale+ (VCU118), How can I integrate this into my HDL design? (like for Xilinx IP's we have HDL stub, and I can instantiate stub in my top HDL design ).
It seems to me, I need to use an AXI protocol between my top design and PMOD IP. Do you have any examples design? (Like for SDK we have this https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start) .
Thanks in Advance
Posted March 21, 2018
Here I am attaching the all the files along with setup image. Could please help me in resolving the problem?
Posted March 20, 2018
Thank you for your reply.
I am providing 100MHz (10ns) clk to VHDL module. when I am applying 3.3V between A1 and GND on spartan 6 it is showing FFFF and 0V between A0 and GND it is showing 0000.
Similarly ( clock is 100MHz), I have done on VCU118 but the results are not correct.(shown in image )
Do you think is there any issue with the level shifter? I am using pmod in the default mode, I haven't done any level shifting.
I am using pmod in the default mode, I haven't done any level shifting, is that a problem? if so how to do the level shifting? e any level shifting, is
Posted March 20, 2018
Edited March 20, 2018 by CKV
Thank you, I have cross-checked the design, I am attaching the image of observed signals on ILA, may help you identify the problem
I have applied 1) 0V on D0 and 2) 3.3V on D1
Posted March 19, 2018
Hello Thank you for your reply.
Yes, VCU 118 has the level shifter.
Posted March 18, 2018
The issue is I am trying use Pmod AD1 (ADC) for connecting to VCU118 pmod port, It is not giving an accurate conversion of analog input, the signal keeps changing (please see in the attached image) even when the analog input is constant?
What would be the exact reason for this?
The same design I was implemented on the Nexys Spartan 6 board, it is working perfectly. Just I changed the XDC file for connecting to VCU118 (pins from AV16 to AT16)
Posted March 14, 2018
Thank you for your support.
Posted March 13, 2018
Thank you, I have proceeded according to your suggestions I am getting a follwing error?
Can you please help me out?
can I get the HDL files for the PMOD AD1? Exactly I need code which can take the AD1 outputs D0 or D1 to HDL module and gives me the output has 12bit number. so that I can process these 12bit numbers in subsequent modules.
Hello, Digilent vivado library ( https://github.com/Digilent/vivado-library) is not supporting for Virtex ultra-scale + (VCU118), The board can support for the MicroBlaze and PMOD
Posted February 7, 2018
Thank you for the reply. I can change from nexys 3 UCF to Virtex ultra scale+ XDC for those VHDL codes. The main module needs 100MHz clock, I can provide that frequency from one of the clock generators on Virtex ultra scale+. What would be the maximum AD2 conversion rate?
Thank you for the reply. yes AD2 is the 4 pin (2x4=8) module. For AD2 and DA1 digilent having the VHDL reference codes for Nexys 3 board.(https://reference.digilentinc.com/reference/pmod/pmodad2/start). Can I use same codes for any FPGA device by changing UCF file?
Posted February 6, 2018
Can I use AD2 and DA1 simultaneously by connecting to my 12 pin pmod on virtex ultra scale+? I found reference VHDL codes in digilent for both so I am planning to use the AD2 and DA1, instead of AD1 and DA4.
Posted January 26, 2018
Thank you for the reply.
Posted January 24, 2018
Thank you for the reply. So now by using the pmod splitter cable, I can connect both ADC and DAC, also I can send and receive data from DA/AD simultaneously. If I buy AD1 and DA4 from Digilent, will they provide example RTL code?
Posted January 23, 2018
Thank you for the reply. I would like to use Pmod AD1: Two 12-bit A/D Inputs and Pmod DA4: Eight 12-bit D/A Outputs, Both are the 6-pin Devices.
My Board Virtex ultra scale+ have the 12 pin PMOD (8-I/O and 2-Vdd and 2-GND). Can I use 6pins for connecting ADC and another 6pins for DAC Simultaneously? Here I am attaching my Board PMOD pin Information.
Posted January 20, 2018
Can I implement the ADC and DAC at the same time using Pmod IOXP: I/O Expansion Module on Virtex ultra scale+ FPGA?
Thanks in advance.
Posted December 19, 2017
Do we have any PMOD module which has both ADC and DAC in the same module?
Posted December 12, 2017
Thank you for your reply. I will contact the Xilinx for suggestions
Thank you for your reply. I need 3-4 channel 12 bit ADC.
Is there any way to implement ADC on the board without using external PMOD Device?
Posted December 11, 2017
Posted November 28, 2017
The problem has been resolved. I have installed FTDI cable drivers for converting JTAG into Universal Serial Converter. Shown in below snapshot.
Thank you Jpeyorn.
I have connected to the USB-JTAG port only. But still, it is not recognizing.