CKV

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  1. Hello @jpeyron I have upgraded the PMOD IP's for Virtex ultra scale+ (VCU118), How can I integrate this into my HDL design? (like for Xilinx IP's we have HDL stub, and I can instantiate stub in my top HDL design ). It seems to me, I need to use an AXI protocol between my top design and PMOD IP. Do you have any examples design? (Like for SDK we have this https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start) . Thanks in Advance
  2. CKV

    PMOD AD1 HDL codes

    Hi @jpeyron Here I am attaching the all the files along with setup image. Could please help me in resolving the problem? Top_FPGA_AD1.v pmodad1_test.vhd AD1.xdc
  3. CKV

    PMOD AD1 HDL codes

    Thank you for your reply. I am providing 100MHz (10ns) clk to VHDL module. when I am applying 3.3V between A1 and GND on spartan 6 it is showing FFFF and 0V between A0 and GND it is showing 0000. Similarly ( clock is 100MHz), I have done on VCU118 but the results are not correct.(shown in image ) Do you think is there any issue with the level shifter? I am using pmod in the default mode, I haven't done any level shifting.
  4. CKV

    PMOD AD1 HDL codes

    Hello Jpeyron, I am using pmod in the default mode, I haven't done any level shifting, is that a problem? if so how to do the level shifting? e any level shifting, is
  5. CKV

    PMOD AD1 HDL codes

    Thank you, I have cross-checked the design, I am attaching the image of observed signals on ILA, may help you identify the problem I have applied 1) 0V on D0 and 2) 3.3V on D1
  6. CKV

    PMOD AD1 HDL codes

    Hello Thank you for your reply. Yes, VCU 118 has the level shifter.
  7. CKV

    PMOD AD1 HDL codes

    Hello, The issue is I am trying use Pmod AD1 (ADC) for connecting to VCU118 pmod port, It is not giving an accurate conversion of analog input, the signal keeps changing (please see in the attached image) even when the analog input is constant? What would be the exact reason for this? The same design I was implemented on the Nexys Spartan 6 board, it is working perfectly. Just I changed the XDC file for connecting to VCU118 (pins from AV16 to AT16) Many thanks.
  8. CKV

    PMOD AD1 HDL codes

    Thank you for your support.
  9. Thank you, I have proceeded according to your suggestions I am getting a follwing error? Can you please help me out?
  10. CKV

    PMOD AD1 HDL codes

    Hello, can I get the HDL files for the PMOD AD1? Exactly I need code which can take the AD1 outputs D0 or D1 to HDL module and gives me the output has 12bit number. so that I can process these 12bit numbers in subsequent modules.
  11. Hello, Digilent vivado library ( https://github.com/Digilent/vivado-library) is not supporting for Virtex ultra-scale + (VCU118), The board can support for the MicroBlaze and PMOD Can you please help me out?
  12. CKV

    Pmod IOXP: I/O Expansion Module

    Hi JColvin, Thank you for the reply. I can change from nexys 3 UCF to Virtex ultra scale+ XDC for those VHDL codes. The main module needs 100MHz clock, I can provide that frequency from one of the clock generators on Virtex ultra scale+. What would be the maximum AD2 conversion rate?
  13. CKV

    Pmod IOXP: I/O Expansion Module

    Hi JColvin, Thank you for the reply. yes AD2 is the 4 pin (2x4=8) module. For AD2 and DA1 digilent having the VHDL reference codes for Nexys 3 board.(https://reference.digilentinc.com/reference/pmod/pmodad2/start). Can I use same codes for any FPGA device by changing UCF file?
  14. CKV

    Pmod IOXP: I/O Expansion Module

    Hi JColvin, Can I use AD2 and DA1 simultaneously by connecting to my 12 pin pmod on virtex ultra scale+? I found reference VHDL codes in digilent for both so I am planning to use the AD2 and DA1, instead of AD1 and DA4.
  15. CKV

    Pmod IOXP: I/O Expansion Module

    Hi JColvin, Thank you for the reply.