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Everything posted by JColvin

  1. Hello @BeamPower, From my understanding you would be able to either work from the existing Vivado environment (it would ask you if you want to close out the existing project) or work from a fresh GUI without issues. But, I ran through the tutorial (for the Cmod A7 35t version) on my own Vivado 2016.4 and received the same errors that you did, so I have contacted the creator of this project and have asked them to help explain the proper way to go through this tutorial/correct it. I do not know if they are in the office today though and Digilent is closed on the weekends, but I'm hoping for an easy solution (as I imagine you are as well). I'll let you know if I get any updates. Thanks, JColvin
  2. Hi @InterestedTom, I don't have an IDC connector on me to confirm this, but I'm thinking the nubs on the sides (presuming we're thinking about the same standard connector) will not let it fit nicely; the Analog Discovery pins are pretty tight fitting with regards to the 100 mill spacing. @attila may have a better informed opinion on this though. Thanks, JColvin
  3. JColvin


    Oh, and for others reading this thread, here is the video that asmi is referring to: https://www.youtube.com/watch?v=nzQYLflFfmo
  4. JColvin


    Hi @asmi, I talked with my supervisor and learned that the Arty S7 is still in development at this point, so we don't know what ports and peripherals will be available on the board as of yet. Hopefully we all get to learn what it has soon! Thanks, JColvin
  5. JColvin

    LUT utilization tips

    Hello, I have upped the message count limit for PMs using some super secret methods (*looks at profile icon label*) ...or maybe not so secret methods. Please let me know if this ever becomes a problem again in the future. Thanks, JColvin
  6. Hello @a_basys3_user, I unhid your post; do you mind sharing what you found the problem to be and how you solved it? That way other people who run into the same issue you did would be able to search and find out the answer without having to go through the same troubleshooting process. Thanks! JColvin
  7. Hello, I have moved your question to a more appropriate thread where the engineer best suited to help you will be able to see and respond to your question. Unfortunately, I don't know the answer to your question, so I won't be of much help in this case Thanks, JColvin
  8. Depending on how your code is set up, you could also create what is known as a custom command in LINX. There is a Forum thread that walks through how to make one here as well as some documentation from LabVIEW MakerHub on it here. The idea behind a custom command is that LabVIEW (LINX) would send out a single command (realistically this will still be 5 bytes or so thanks to the packet checking), but then all of the operations will be done on the system board (WF32, Raspberry Pi, etc) based on a function that runs through the procedure once it receives the command packet from LabVIEW. This helps prevent LabVIEW needing to send out multiple commands of read this pin, process this, send out this, process again, etc, and can just have the microcontroller do all of the processing at it's own faster pace and then send the result back to LabVIEW when it is finished. If you have a lot of back and forth between LabVIEW and the MCU, this can definitely speed up the loop rate by merit of simply not communicating as often. The drawback with this is you'll have to do error testing and debugging on the microcontroller side rather than being able to do everything within a single environment, but you do get to potentially (again, depends on your application setup) speed up your loop rate. I guess as a side note, you are not able to port your LabVIEW VI to the chipKIT boards like you are with the BBB and RPi's at this point in time (as you noted) so there isn't a nice way to get those sort of speeds as far as I know. Hopefully that will be able to be done in the future, but I'm not privy towards those sort of developments. Thanks, JColvin
  9. Hello, You can check out the change logs on our Wiki for WaveForms here: https://reference.digilentinc.com/reference/software/waveforms/waveforms-3/previous-versions, but I'm not seeing any new updates yet nor have I heard anything new as of yet... Thanks, JColvin
  10. Hello, I've updated the reference manual for the Pmod IOXP to reflect the pin headers: https://reference.digilentinc.com/reference/pmod/pmodioxp/reference-manual. I would like to update the manual further with some more details on how to configure and work with the ADP5589, but I want to update the manual cleanly in one go rather than having it be in flux for a time where everybody besides me is confused about the state of the reference manual. I'm hoping that'll be done later this week. Thanks, JColvin
  11. JColvin

    Connector components

    Hi @Jon Frey, That looks like it would fit nicely. My only concern is that it also looks like it is just the housing without any built-in wires/pins, but I'm not sure if that was intentional on your part or not. I did a little bit of research and came up with a Mouser list of the header versions of these that do have built-in pins in case that was actually what you were looking for (link to Mouser search). Thanks, JColvin
  12. JColvin

    LabView Home Version

    Hi @Jon Frey, Signal Express is not included with LabVIEW Home Edition; the features that do come with LabVIEW Home (as per this page) are the LabVIEW Full Development System, the LabVIEW Control Design and Simulation Module, the LabVIEW MathScript RT Module, and the LabVIEW Application Builder Module. The LabVIEW Database Connectivity Toolkit and the Report Generation Toolkit for Microsoft Office are also not part of LabVIEW Home, even though they are included in the download for it (though I have no idea why they are in the download), which is why the serial number didn't work for some of the elements in the download. LabVIEW does have a ton of examples in the LabVIEW Example Finder (available under Help>Find Examples, in case you weren't already aware of it), so you wouldn't have to start completely from scratch. Thanks, JColvin
  13. JColvin

    HS2 HS3 Slew rates

    Hello @wrb123, I have asked one of our senior engineers about this; I hope to have a response back to you in the next day or so. Thanks, JColvin
  14. Hi @Mqasimag, Looking at the demo, it looks like the demo only uses the top six pins on the Pmod GYRO, so I would recommend getting a six-pin cable and 6 gender changer so you can connect your GYRO to the Basys 2 without having the lower set of pins being stopped/blocked by the PCB. It'll end up looking similar to this image: Please let me know if I misunderstood your question. Thanks, JColvin
  15. Hi @jonathanar1701, I have moved your question to the FPGA section of the forum where it is more likely to be seen by an engineer better suited to help you. That being said, I believe (as per this thread) that the Basys 3 uses the General IO demo, which is labeled as "GPIO" on our GitHub. From what I can tell, it only uses VHDL code (available on Github or in zipfile on our Wiki) and no IP cores. Let us know if you have any more questions. Thanks, JColvin
  16. Hi @coloradosensors, I am not certain what the issue is; I am hoping to be able to look into it very shortly. Thank you for your patience, JColvin
  17. Hi @Anju Johnson and @[email protected], I'm not certain why the XDC file is not mentioned at all. I suppose we were presuming that users might have read through other tutorials that do mention it, namely the programming guide, but even then it is a little bit vague... So I will make sure this gets changed, or at the very least points to a tutorial before the project formally starts that explains how to get the XDC file and other setup stuff ready to go. Otherwise, I guess I can recommend checking out step 7 of this guide: https://reference.digilentinc.com/learn/software/tutorials/verilog-project-2/start. Edit: I just learned that installing the board files for this sort of project eliminates the need for an XDC file since it essentially constrains the pins for you. So @jpeyron's question then applies (who told me this info) since they aren't certain why you received this error. Thanks, JColvin
  18. Hi @cvtabc, Agreed about the IPs. I'm not certain what licenses you receive access to; I did a bit of searching for a list of what IPs come with which editions of Vivado but came up empty (but maybe I was searching in the completely wrong location). Some, like the TEMAC I mentioned, apparently won't (from what I've been told from my coworkers) be licensed via the Design Edition, just be able to have a bitstream generated, since apparently the WebPACK Edition will not generate the bitstream for whatever reason. I do not know if such license list exists; the people over on the Xilinx forum might know that answer. Otherwise, it may all be manually asking about individual IPs. Thanks, JColvin
  19. Hi @Clarissa, I'm mostly echoing what @jpeyron said, but from your project requirements, it looks like the Nexys Video that @[email protected] mentioned will likely be your best option if you don't want to use some sort of expansion addon. It'll also have some spare pins available for what you are needing since it has 34 differential pairs on the LPC FMC (which from my understanding you can use as single ended pairs) in addition to the four Pmod ports. If you're fine with the expansion options introducing delays, then your options expand to a much wider range since (from what I can tell) you will then be mostly looking to see if the embedded components you are needing exist on the board and if the FPGA has enough "room" for what you need to do. The Zedboard and Genesys 2 will also work, but have either an entirely different architecture (an SoC on the Zedboard) or are a much larger and fancy FPGA with a HPC FMC in the case of the Genesys 2. Let us know if you have any more questions. Thanks, JColvin
  20. JColvin

    Zedboart to PC via USB

    Hi @CrazyTown, I have moved your question to a different section of the Forum where an engineer better suited to help you will be more likely to see your question. Thanks, JColvin
  21. Hello @Clarissa, I don't know what your project requirements are, but if you're just looking for the 40 pins, you might want to look into the Arty or the Cmod A7. To be fair, these don't have have the same "amount" of FPGA as the Nexys 4 DDR and neither have video capabilities (I don't know if you were needing that in your project), but they do have at least the 40 pins (which I *think* are all available as general purpose pins) and the Arty also has the DDR memory. In terms of an expansion module of some sort for the Nexys 4 DDR to get more I/O pins, there will have to be some delay as you are inevitably going to have to work through another chip with a (de)mux rather than having the signals directly come in on their own dedicated lines to the FPGA, but depending on your design this can potentially be accounted for. Let me know if you have any more questions or details on your project. Thanks, JColvin
  22. Hi @Vinit Shukla, What sort of screen resolution does your display support? I presmed you changed the constants in the provided in the VGA.vhd file as per the settings listed for your particular display on this page? Thanks, JColvin
  23. @Cristobal, Letting you know that I still want to take another look into the Pmod AD5 code, but I haven't managed to find a free moment to dig into it... hooray for having myriad of other tasks to do everyday! I'll let you know what I find when I get the opportunity to check it out. Thanks, JColvin
  24. Hi Assane, I'm not the most familiar with the Adept API, but it looks like you can use the DmgrGetInfo() command with the "dinfoUsrName" parameter value to query the device to find out it's name since I imagine it's something like "HS3". I found these in the DMGR Progammer's Reference Manual on page 2 and the Digilent Adept System Programmers Reference Manual on page 8 that came with the Adept SDK download. Again, I'm not the most familiar with this so I personally can't speak towards the accuracy of this, but I'll make sure you get the help you need. Thanks, JColvin
  25. Hi @HansV, Glad to hear you like it! I was about to post on one of your other threads talking about some of the features that 3.5.4 implemented (like timestamps on the tags) since I learned about the software update today, but clearly you're already aware of it. Definitely big thanks and shoutout to @attila, whom, afaik, implemented all of those changes himself. And to others who might be reading this thread, if you ever wish that the Digilent WaveForms software had some sort of feature, don't be afraid to suggest/request it. To be fair, we won't offer any promises to implement it, but sometimes we (well, @attila) do. Thanks, JColvin