JColvin

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Everything posted by JColvin

  1. Hi @tpitman, I don't have a nice datasheet to the the shaft encoder to directly link you to, but we just recently (i.e. today) added a 3D step file of the Pmod ENC to it's Resource Center, so hopefully you'll be able to get all of the dimensions you need from there. Let me know if you have any questions about this. Thanks, JColvin
  2. Hi @kbroad, I have attached the datasheet for the screw terminals used the Pmod RS485. Thanks, JColvin 163-471 TC020062000AG.PDF
  3. Hi @Kody, Those of us here at Digilent haven't worked a lot with the NXT Sensor Adapter (Digilent just made the hardware and did very little work on the software side of things), so we will be of limited help in that regard. However, I did learn that the NXT Sensor Adapter does have a mux built into it where you select which output you are using because the Lego Mindstorms NXT sensor adapters were all hard-coded with their I2C addresses, so the only way to support multiple of the same sensor was to switch which one you were talking to with the mux. With this in mind, there is a possi
  4. Hi @koseki, As @BogdanVanca mentioned previously, those of us here at Digilent haven't used eFUSE before so we don't have a lot of advice on it, so we're not certain which control bit caused the QSPI to not be programmable; I would recommend asking on the Xilinx forums to confirm your suspicion about disabling the reading of the AES key preventing programming via QSPI. Thanks, JColvin
  5. Hi @dseagrav, I contacted another one of our engineers about this and they let me know that none of the devices that were previously supported have been removed. However, they did mention that for the newer versions of Adept, available on the Adept Resource Center, have not been tested on any chip older than the 7 series chips present on Digilent made boards, so if a particular newer version of Adept doesn't work on the Spartan IIE chips, you'll need to go back to an older version to find one that is compatible. Let me know if you have any questions about this. Thanks, JColvin
  6. Hello, I'm not sure if you have a question associated with this post since it appears to be a repost of National Instruments material, but let me know if you do have a question. Thanks, JColvin
  7. Hi @aerbey, Unfortunately, Digilent does not have any guides available on designing your own custom PCB. Thank you, JColvin
  8. Hi @Digilentuser, There is currently not any plans to integrate the functionality into the LabVIEW driver for WaveForms at this time. Realistically, you could use the WaveForms SDK software (which is part of the WaveForms software download which you should already have done) since it is my understanding that the LabVIEW driver calls the functions within WaveForms SDK to perform the acquisition. Thanks, JColvin
  9. Hi @Digilentuser, Unfortunately, the Impedance Analyzer you can find in WaveForms was developed after the LabVIEW-Waveforms combination so the impedance analyzer functionality does not exist in there. Thanks, JColvin
  10. Hi @ColinDJ, I have moved your thread to a more appropriate section of the Forum where the engineer much more experienced with the Analog Discovery will be able to see your post. Thanks, JColvin
  11. Hi @AnasMu, Just realized I misunderstood your question. The clock output on IC4 that you would want to connect your external clock to is pin 3. I have attached an image of where this is located on the bottom of the Pmod IA below. Naturally, you will also want to connect the grounds between the Si5351 and the Pmod IA (available on header J1 or on pin 2 in the unloaded IC4). Additionally, you will encounter some difficulty running a continuous frequency sweep over the range you specified as per the AD5933 datasheet (more details on this on page 17). Let me know if you have any qu
  12. Hi @AnasMu, If you are referring to the Pmod IA, the I2C clock pins are located on header J1 (labeled as SCL), just below the single pin on header J2. If you are instead referring to the Si5351 (such as this one from Adafruit), none of us here are familiar with that particular chip, but based on the pinout page, it looks like it has three generated clock outputs available on the 3 normal 100 mill spaced pins. The three sets of the triple pads at the top are loading spots for SMA connectors that you can add yourself. The output clock (if you are using it as a I2C clock) can be connect
  13. Hi @Shubham Jain, I am taking a took into this. Comparing the two datasheets, it seems that the two controllers (a KS0066U on the Pmod CLP and the Hitachi HD44780) should be compatible, but I was not able to get the project to work "out of the box" either, so I am looking to see if there is some sort of subtle difference between the two. It seems that it initializes the display part way as the display turns on with only one line enabled, as the demo sets up, but as we both saw, nothing further happens. Thanks, JColvin
  14. Hello @Racyus Delano, I would instead recommend working with the NetFPGA group as they have a lot more dedicated experience with the SUME board than any of us here at Digilent; the sign-up for that community is available here if you are not already a part of it. Digilent will be able to help you more with the hardware errors and what can be done about it if that group is unable to help you. I do know that the recommended version of Vivado for running the SUME acceptance tests is 2016.4 as improvements to the MIG were made in that version to help mitigate any false negatives that were gene
  15. Hi @tpitman, That's alright, thanks for sharing what you found! Thanks, JColvin
  16. JColvin

    spi zynq

    Hi @Ram, Check out this page to get an idea of what each of the operators do. In general it says if a statement is true, do the statement before the ":", if not true, do the statement after the ":". Thanks, JColvin
  17. Hi @Shubham Jain, Which demo for the Pmod CLP are you referring to? If you are referring to the "Library and MPIDE Example" that is on the Pmod CLP Resource Center, that demo has only been designed for the Pro MX4, so as is it is not pin compatible with an Arduino Uno. If you are not using that demo, which demo are using and how do you have it set up? Thanks, JColvin
  18. HI @tpitman, I measured the Pmod ENC responses on a oscilloscope here and found out the following details (which I'll need to update the reference manual to properly reflect the information. When rotating clockwise, B gets a rising edge first, followed by A. Rotate counterclockwise, A gets a rising edge first, followed by B. The time difference between them was in the 5 to 8 ms range, so the Pi should be able to detect them just fine, though admittedly I wasn't rotating the knob super fast. I have found in the past that when I rotated it too slowly, the microcontroller I was using wo
  19. Hello @Sridhar Prasath Aruppukottai Ganesan, Unfortunately, those of us here at Digilent are not familiar enough with Xilinx's UartLite interrupt example to be able to readily be able to explain and modify their demo. As Jon mentioned on your other thread, you'll likely need to reach out to Xilinx support on their forum for some additional support. We did find this blog that talked about using UART interrupts on a FPGA that might be helpful to you. Thanks, JColvin
  20. Hello @cmdigilent, Unfortunately, the Arty Z7-20 HDMI in and HDMI out demos (link to each Wiki page here and here, respectively) have only been created for Vivado 2016.4 and Xilinx SDK 2016.4, so the demos will not work as is on the 2018.1 editions of the same software. Thanks, JColvin
  21. Hello @feydrautha, The WebPACK Edition of the Vivado Design Suite is provided for free on the Xilinx website here: https://www.xilinx.com/support/download.html. Digilent itself does not provide the Vivado Design Suite. Let me know if you have any questions about this. Thanks, JColvin
  22. Hi @cmeuchel, Neither the Pmod AD1 nor the Pmod AD2 have differential inputs. The Pmod AD1 inputs A0 and A1 go to two separate ADC channels and otherwise use common ground as a reference. In principle for both Pmods, you could compare separate inputs to each other after the data has been received by the host board, though you would not be able to use different "grounds". As for the number of units you can put on a SPI bus for the Pmod AD1 (the Pmod AD2 is I2C based), you are in theory limited by how many separate CS lines you provide, one for each Pmod, since you could share the
  23. Hi @juliosilva, We do not have an enclosure for the AD2 BNC adapter that is readily available. There is a mechanical drawing available for the BNC Adapter on it's Resource Center here though. Thanks, JColvin
  24. Hello, The engineer let me know that it is probably better to power VDD first, but they have not experienced any issues when VREF was powered first instead. As for the second question, the module has bypass capacitors on each rail, so no external bypass capacitors are needed. Thanks, JColvin
  25. Hi @vivekraj2992, In general, you can use the USB power supply for most projects including the Advanced I/O demo that is available on the Nexys 4 DDR Resource Center which uses the all of the switches, LEDs, buttons, seven segment displays, VGA, DDR2 memory, built-in accelerator and more, so unless you were planning on running a much more extensive project, you can probably get away with never needing to use an external power supply. If you do want to use an external power supply, it will need to be a 5V power supply with at least 1A capability, as described in the Nexys 4 DDR refer