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Everything posted by JColvin

  1. Hi @pgmaser, None of our Spartan 3 boards (link to their resource Centers here and here) have a 4-character character seven segment display, though they both have an LCD character screen. Could you provide the link of what board you are thinking of? I am not certain of what all ISE would specifically need for it's version of the board-files that are used in their Vivado software, aside from the details you mentioned. Neither Digilent nor Xilinx created this type of file for the Spartan 3E boards though. The User Guide for the Spartan 3e talks about the PROM, RAM, and JTAG connections; that guide is available on the right hand side of the Resource Center under Documentation, linked for your convenience here. Beyond that though, we don't have much advice for creating the prebuilt library as ISE stopped being actively worked on back in 2013. Let me know if you have any questions. Thanks, JColvin
  2. Hi @harsh, The best recommendation I can give you would be to ask the NetFPGA mailing group which you can sign up for on their NetFPGA GitHub here. From there, it seems it can take up to 5 business days to get accepted though. Thanks, JColvin
  3. JColvin

    Pmod wifi

    Hi @kavya@iiitn, Why are you opening Vivado? The project I linked to in the other thread with instructions states to directly open Xilinx SDK. Thanks, JColvin
  4. Hello @CNg33, What other details are you looking for besides the schematic that is available on the OpenLogger Resource Center (https://reference.digilentinc.com/_media/reference/instrumentation/openlogger/openlogger_sch.pdf)? Otherwise, the first page of that schematic lists the maximum current for each voltage line with the regulator handling a maximum of current of 1 amp. Thanks, JColvin
  5. Hi @CNg33, 1) No, the OpenLogger does not support triggers to start sampling process on an analog input. 2) The OpenLogger doesn't have readable data logging to the SD card at this point in time, though I think 3) No, I do not think there is a way to increase the bandwidth on the OpenLogger since that would require a hardware change and have been informed that even if you multiplexed the ADC channels the bandwidth would not improve. The drop-off after 50 kHz will be quite sharp as it was designed similarly to the OpenScope MZ which also has a sharp roll-off after its 2MHz bandwidth at -3dB as shown on page 45 of the Microchip Masters presentation for the OpenScope MZ here. I haven't done math to figure out what the bandwidth would be at 100 kHz for an OpenLogger, though I do know it's a 2-pole filter that is used on each analog input. Thanks, JColvin
  6. Hi @CNg33, There is not a way to generate a pulse wave on WaveFormsLive; the current waveform options are a sine, triangle, ramp up, square waves, and DC output, with the ability to change the frequency, amplitude, and DC offset as appropriate. As mentioned on this thread, the math function button is not operating correctly; I tried the smaller buffer size that was recommended to me but to no avail. I will let you know when I hear an update on this. Thanks, JColvin
  7. Hi @Bogdan50 and @CNg33, I followed up with the firmware engineer, but they let me know that they aren't certain what the issue and don't have the bandwidth to fix it at the moment. All they know is that the data buffer is large and that the delay is caused by the math functions processing the buffer. Eventually, the calculations complete, but may take a while. At the moment the suggestion is to run with a smaller buffer until a better solution can be implemented. Thanks, JColvin
  8. JColvin

    Pmod wifi

    Hi @kavya@iiitn, You need to keep your router set to DHCP; this should be the recommend settings of your router as per it's manual here, rather than a static IP; the example project we provide with our Pmod WiFi determines and sets up the IP address and the connectivity for you; you only need to provide the SSID and password to the WiFi -- this is described in this post here. Additionally, in your earlier post showing your router and Zedboard, it looked like you both 1V0 and 2V5 selected with jumpers on the VADJ select in the bottom right corner of the board near the 5 push buttons. This will cause conflicting voltages on the Zedboard and likely damage it, particularly on the FMC. I would also not recommend showing all of your router settings (I removed the picture) as that can provide all of the details a hacker needs to access your internet. Thanks, JColvin
  9. Hi @Richard Gold, I have moved your question to a more appropriate section of the forum where the engineer best suited to respond to your question will be able to see and respond to it. Thanks, JColvin
  10. Hi @norbe13, I apologize for the delay. I'm not sure of the recording capability built into the LabVIEW set of VIs, but there are a couple of threads that might be of help to you here and here. Maybe @attila will have some more advice for you. Thanks, JColvin
  11. Hi @zygot, Unfortunately, we don't have an individual license available for purchase (as per Xilinx instructions to Digilent since they were the ones that provided us with that bit of material for their software), unless you purchased a new board that included a Design Edition voucher (which I think is just the Genesys 2) or got a license from Xilinx directly. With regards to your situation and contribution though, I will ask around and see if an alternate solution is available. Thank you, JColvin
  12. Hi @toshas, I don't have access to unlock the LINX forums, but I will ask to see if the forums could become unlocked instead. As mentioned though, Digilent hasn't done any work on LINX since late 2016, so nearly all of the discussion on the LINX forums will likely be community driven rather than with responses from the developer. Thanks, JColvin
  13. JColvin

    pmod wifi

    Hi @harika, Did you attempt the project that @jpeyron graciously completed for in the 2016.1 version of Vivado? That would be a good way to determine if everything works correctly, but from what I can tell you ignored his project and choose to work in a different version of Vivado with that project which is a good way to generate errors. The critical warnings do not matter; it simply is stating the IP was designed for a different board. Since you are using 2017.4, I went through the process of getting the Pmod WiFi successfully working on a Zedboard. This is what I did: Connect your Zedboard with a 12V supply and a USB cable to both UART and PROG (J14 and J17) to your computer. Turn on the Zedboard. The SD card should have the contents as shown in this post here, and the Pmod WiFi should be in port JC Download this completed project that @jpeyron already completed from here Copy the folder that is contained in that .zip file to an easy to find location Open up Xilinx SDK 2017.4 When it asks you to choose a workspace folder, choose the folder that you copied to an easy to find location Once Xilinx SDK has finished opening, choose the orange Import Project button that you see on the middle of the Xilinx SDK window In the Select root directory option, click the associated Browse button and select the folder that you copied to an easy location Ensure that the design_1_wrapper_hw_platform_0, HTTP, and HTTP_bsp are selected and then click "Finish" In the Project Explorer on the right hand side of SDK, open up the HTTP folder, go to the src folder, open the deWebIOServer folder, and then open the HTTPServerConfig.h file Change the * szSsid and * szPassPhrase to appropriate WiFi details Click the File button in the upper left and choose the save button Click the Xilinx button at the top and choose the "Program FPGA" option Keep all of the default options Right click on the HTTP folder and choose "Run As" option Choose the "Launch on Hardware (System Debugger)" option that appears Open the serial terminal of your choice (such as Tera Term) and connect to the Zedboard at 115200 baud with 8 bits, 1 stop and no parity. Thanks, JColvin
  14. Hello @Will, I have moved your question to a more appropriate section of the forum. I am not certain if the specs you listed (30 MHz for 20 seconds and record the data) is possible; I will have to defer to @attila on that one. The main drawback from my understanding is keeping that amount of data in memory so that it can then be saved/stored on your computer. A record mode where the data is both sampled and stored is available, but it runs slower to account for USB transfer speeds (as far as I understand it). It is certainly possible to run several possible processes simultaneously including the analog reading, motor control, and waveform generator simultaneously. I do not think cores will really be an issue for Waveforms since I don't think (again deferring to @attila) that individual processes operate on their own thread. Thanks, JColvin
  15. Hi @Rozita, I have moved your question to a more appropriate section of the forum where the engineer most suited to answer your question will be able to see and respond to it. Thanks, JColvin
  16. Hi @Mike Reynolds, I learned that the chip you see is accurate and is an alternate build piece, but should not make a difference as the manufacturing test does not change to account for this different part. What version of Vivado are you using? And to confirm I understand this correctly, the General I/O demo worked successfully for you on both boards, but not your project? Thanks, JColvin
  17. Hi @Mike Reynolds, We're looking further into this; I got ahold of a Rev E and can see the exact same Micron chip that you have, so I am verifying if this should be accurate since all the written materials I mentioned indicated otherwise. Thanks, JColvin
  18. Hi @johnsan1, I haven't used that particular piezo element before, but my understanding is that it should work fine based on the datasheet. Thanks, JColvin
  19. Hi @Bogdan50, I have asked our firmware engineer about this; I was also not able to get the math function to work with the OpenLogger. Thanks, JColvin
  20. JColvin

    Help for project

    Hello @johnsan1, I responded to your other thread here. Thanks, JColvin
  21. Hi @johnsan1, I'm not certain which exact piezo sensor you are looking at (since the datasheet for the piezo sensor had a variety of sensors), but based on the one that matches the image, I think it would be compatible with the system board. Realistically, the piezo sensor would not affect the functionality of either the Pmod TC1 or the Pmod WiFi and it would matter if it is compatible with your intended system board. Do you happen to know what system board you are intending to use? Thanks, JColvin
  22. Hi @Alain Gravel, I have moved your question to a more appropriate section of the forum where the creator of the WaveForms software will be able to see and respond to your question with much more accuracy and detail. Thanks, JColvin
  23. Hi @kotra sharmila, The reality is that those of us here at Digilent have not worked with traffic sign recognition or have a lot of experience with OpenCV outside of what we have shown in your other thread. I found a few potential sources of material for traffic sign detection here, here, here, and here, but seeing as this sort of project is usually PhD level project, we will not able to effectively provide feedback for project. Additionally, as per the forum guidelines, we will not necessarily be able to provide a project that meets your needs. Thanks, JColvin
  24. Hi @Raymond Drost, As a clarification check since it wasn't explicitly stated, you have both the power supply and the usb cable connected to the Analog Discovery 2? Thanks, JColvin
  25. Hi @JamieJ, I believe what you are running into here is on your oscilloscope settings; it looks like you have set the trigger to happen when it crosses the 0V threshold, so the measured cosine wave appears to be a sine wave (which as you noted are the same thing, but with a phase difference). If you wanted it to look like a cosine wave, you will need to set the Level to 1V rather than 0V. This parameter is in the upper right of your second screenshot. Let me know if you have any questions about this. Thanks, JColvin