JColvin

Hi @peterhu, Could you let know in better detail about how you were using your Eclypse Z7 when it got damaged? The design engineer suspects in this situation that the regulator might be fine and that it is different ICs that have been damaged, but we'll need some more information to help better troubleshoot this. Could you also let me know what test points you measured to determine the regulator was damaged (this post, https://forum.digilent.com/topic/25689-rma-request/, has reference list of useful capacitors to measure). Thanks, JColvin

Hi @Patrick J. Mills, I asked the design engineer about this and received the following information. - When the USB controller is held in reset the current consumption is ~20 mA - When the USB controller comes out of reset and enumerates on the USB bus it's ~87.5 mA - When both channels are being used, the worst case current draw on Vdd is around 115 mA with 90 mA typical. You didn't ask this, but they also let me know that for Vref the current draw at 30 MHz is 12.5 mA typical and 35 mA max. Let me know if you have any questions. Thanks, JColvin

Hi @peterhu, You mentioned that measured the Vcc end of the JB pin. Could you describe a bit more of what you mean by this? Do you mean that you had an SMA cable connected to the Zmod Scope and then somehow measured a Vcc on the underside of the board with one of the clips? Or something different? What gain setting were you using when you were testing the Eclypse Z7? Thanks, JColvin

Hi @nes, I'm not certain which board you are using, but in general it would not be possible to use external flash memory in place of on-board memory to boot up/configure an FPGA on start up because it will not be connected to the correct FPGA pins, as is the case for the on-board flash chip on the Arty A7 (page 6 of the schematic, https://digilent.com/reference/_media/programmable-logic/arty-a7/arty-a7-e2-sch.pdf). I haven't done any checking of voltage, size, clock frequency, and command compatibility with the Microchip flash you linked to see if it would be technically possible to replace on-board N25Q128 flash memory, but the potentially larger hurdle would be that the memory chip you mentioned is not in Xilinx's UG908 list of supported memory configuration devices: https://docs.xilinx.com/r/en-US/ug908-vivado-programming-debugging/Configuration-Memory-Support. There are some instructions within that same user guide on how you would create your own memory support, but I haven't look through them to ascertain the difficulty of such an endeavor. Thanks, JColvin

Hi @peterhu, I apologize for the delay. When you say you cannot start the board, do you mean that when you have nothing extra connected to the Eclypse Z7 and flip the power switch that the red power LED does not turn on? Or does the red LED light up but the board is not detected by the Vivado Hardware Manager? Or something different? Thanks, JColvin Edit: I see your other post now that answers my questions, I will respond to that thread.

HI @DBanks60, I apologize for the long delay. I don't have a design edition license on hand to test this out directly for the Genesys 2, but am familiar with the type of errors that I believe you are describing. Regardless, could you provide a screenshot of the errors you are seeing? I didn't have to do this when I tried updating the hardware specification for a Cmod S7 XADC (picked that board simply because Vivado would generate a bitstream quickly for that device), but depending on the error type, you might have to update the Path and Symbols so that Vitis can find all of the included header files, as was the case for an FMC Zedboard project here: https://forum.digilent.com/topic/26801-fmc-pcam-demo-20231-1-path-entry-problem/#comment-81171. Let me know what you find out. Thanks, JColvin

Hi @Charlie_new, Those pins are simply do not have any dedicated contact points on the VmodBB or the VmodWW. I do not know what might have prompted this decision back in 2010, or at least I can't think of anything reasonable. Clearly the documentation surrounding it is incorrect as it falsely claims that there prototype connections on every signal, which is not true. Unless you counted manually soldering on wires to the individual pads for R10, R12, R14, R16, R18, and R20, but that would be tedious and frustrating. I also don't have a Vmod of any variety in my office to even be able to verify that those pads have traces to the IO pins in question. To be honest, I was surprised to learn today that Digilent is still selling this product. If you purchased this product with the expectation of having access to those signals, I would recommend you pursue to return the product for a refund. I'll also put in requests to get the documentation updated. If bought it from Digilent directly, please send me a private message with your order number, purchase date, and preferred email contact so I can get the RMA process started with our sales team where they will contact you to confirm any additional information that I do not have access to (such as shipping address). Thanks, JColvin

Hi @s.gafoor, This would have been the Out-Of-Box Demo which is available in the Additional Resources section of the Zedboard Resource Center: https://digilent.com/reference/programmable-logic/zedboard/start#additional_resources. Let me know if you have any questions. Thanks, JColvin

from user who accidentally clicked report instead of typing in the reply box:

Hello, Years late on my end, but the 5 V and VREG are normally isolated from one another. Vreg is only sourced from an external voltage (via the barrel jack connector) and can be set via the JP1 jumper block to either be regulated to 5 V or 3.3 V. The 5 V rail (along with the +15 V and -15 V rails) are normally sourced from the 20-pin greenish myDAQ connector. However, as the switches and buttons are linked to the 5 V rail (each input has a 200 ohm series resistor as noted in the Reference Manual), if there is no myDAQ to provide power, you would need to "jumper" the Vreg rail to the 5 V rail in order to get the active high signals to then send (via additional jumper wires) to the LED inputs (which have their own 390 ohm current limiting resistor). So, if there is no myDAQ, there is not a problem connecting Vreg to the 5 V rail. You could also connect Vext to the 5 V rail instead, but be wary of what voltage you are then subjecting any on-board circuitry to. Thanks, JColvin P.S. Regrettably, I'm still not allowed to post the myDigital Protoboard schematics.

Hi @Deffe, Digilent does not have a premade BSP for the USB104 board. However, you should be able to create this yourself within Petalinux through various Petalinux commands base it off of the hardware platform that you previously created in Vivado: This process is described a bit more in these guides here: FPGAdeveloper link, Adam Taylor link1, Adam Taylor link2. Thanks, JColvin

Hi @Alon, I apologize for the delay, I have sent you a PM. Thanks, JColvin

Hi @Alon, I apologize for the delay; I have been out of office the last few days, inconveniently starting on the same day you first messaged me. Clearly I'll need to get some of my co-workers the needed information so they can also address these sorts of queries when I am ooo. I have sent you a PM. Thanks, JColvin

Hi @yorch56, When using a 10x probe and a shared ground between the AD3 and the DUT (friendly reminder that when using the BNC Adapter all Scope inputs become single ended), the highest voltage you would be apply up to 250 V. Make sure to set both the Attenuation and Range for each Scope channel via their gear option to the appropriate values so that voltage displays properly on the plot. Let me know if you have any questions, and of course be sure to take appropriate safety precautions when working with these higher voltages. Thanks, JColvin

Hi @nurber3, As best as I can tell, this is a visual bug within WaveForms where the trigger indicator colors is based on some other predefined order. In this case, the magenta color for this third option down in the channel list matches the same dark mode trace color that is used for the third Scope channel for an ADP3450 or a pair of Analog Discovery 3's that being used in Dual Mode. I see the same behavior in 3.20.24 beta in any of the themes (along with the trigger color for the Wavegen channels being slightly out of order as well, appearing to cycle showing the AM, then FM, then carrier channel colors). I don't know the backend of WaveForms to say this with 100% confidence, but I anticipate this will be a straightforward UI fix that Attila can make when he gets the opportunity. Thanks for pointing this out, JColvin

Hi @RodFl, My understanding as a non-Xilinx employee is that as long as you are able to successfully create your Xilinx account to initially download the installer for the Vivado Design Suite, you should be able to use those exact same credentials go through User Authentication to actually install the software. Presuming you are connected to the internet when authenticating for the actual download, to the best of my knowledge you should be able to successfully install Vitis & Vivado. I am not certain if you are getting a particular error when the installer is not accepting your credentials, but unless you are getting a 'Failed export compliance verification' message (to which you'll need to complete an Export Compliance review form, as per here: https://www.xilinx.com/support/export-compliance.html) my best advice would be to contact Xilinx to determine the next best steps. I personally do not recall seeing any posts on the Digilent Forum regarding a failed authentication when the credentials are correct and in compliance with US regulations. The most recent thread (June 2023) I've found regarding this on the Xilinx support channel mentions that aside from the usual password length requirements, you'll also need to double check your timezone settings as well as making sure you are using the correct AMD vs Xilinx credentials: https://support.xilinx.com/s/question/0D54U00006uuhdJSAQ/web-installer-wont-authenticate-credentials?language=en_US. Let me know how it goes. Thanks, JColvin

Hi @xchg.ca, I had not heard of Wow and Flutter audio measurements prior to your post. The short version is that this functionality does not exist in WaveForms. Longer version: Doing some courtesy Wikipedia reading (link1 and link2 for what I looked at in case it matters) on the audio applications for Weighting filters and a single reference saying that the volume / sound pressure is measured with reference to the some lowest hearing threshold (20 uPa according to the one source I looked at), and then the measured value gets compared to some predefined weighting curve? I don't know the backend complexity behind this, but if different reference curves exist (and we were able to get the appropriate sound pressure for the lowest hearing threshold at different frequencies), my opinion as not-the-WaveForms-developer and not an audio expert is that such functionality would be ostensibly possible to add to WaveForms. Attila (as the WaveForms developer) would be better able to comment on such feasibility and practicality. Thanks, JColvin

Hi @Leon18, The JTAG header (J15) uses 2.0 mm spacing as that is the spacing that Xilinx choose for their own JTAG module spacing such as for the Platform Cable USB II ( Xilinx datasheet link); Digilent's JTAG HS2 and JTAG HS3 can also be used with it (or you can simply use a micro B USB cable on the PROG port next to the power jack, but I presume that won't work for your application). As for the XADC header, since the Xilinx datasheet (https://www.xilinx.com/content/dam/xilinx/support/documents/boards_and_kits/ams101/ug886-ams101-eval-card.pdf) for the AMS Eval card that the Avnet created Hardware User Guide alluded to doesn't list any information, I measured the spacing with digital calipers and found that it uses 2.54 mm / 100 mil spaced pins. Let me know if you have any questions. Thanks, JColvin

Hi @BenV, The two types of Serial Converters are present to indicate that you have access to both JTAG and UART through that single USB connection. I'm guessing by your statement of "Vivado can't talk to the HS1" that you mean when you open up the Vivado Hardware Manager it is not able to detect the JTAG HS1 as a target option (JTAG HS1 can't be configured on its own of course as it is not an FPGA). How does the JTAG HS1 show up in the Windows Device Manager? On my Windows 10 machine, when looking at the the Bus reported device description in the Details tab of each of the Serial Converters properties, it shows up as a Digilent Adept USB Device, similar to what is shown in the screenshot in this post: https://forum.digilent.com/topic/21713-brand-new-basys-3-user-cant-get-vivado-to-see-it/#comment-62685. If the JTAG HS1 is not being reported correctly, let me know and I'll help you get the EEPROM reconfigured. Thanks, JColvin

Hi @robert77, Yes all of the Ettus products on either the Digilent store, https://digilent.com/, or on our associated Amazon page, https://www.amazon.com/stores/Digilent/Digilent/page/460CE00B-CD37-4EE6-BA24-13641D2DE3C5, are the official and new products (as opposed to being resold or 2nd hand). Thanks, JColvin

Hi @robert77, Yes all of the Ettus products on either the Digilent store, https://digilent.com/, or on our associated Amazon page, https://www.amazon.com/stores/Digilent/Digilent/page/460CE00B-CD37-4EE6-BA24-13641D2DE3C5, are the official products (as opposed to being resold). Thanks, JColvin

Hi @RHCHOW, The easiest solution would be to put the file on an SD card and then use the Zynq processor to read that SD card. Here's a random tutorial that I found that seems to describe such a process http://www.harald-rosenfeldt.de/2017/12/31/zynq-read-a-wav-file-from-sd-card-and-play-it-on-the-audio-codec/. Otherwise, you would probably want to use some sort of FTP system. The Zedboard Out of Box demo, https://digilent.com/reference/programmable-logic/zedboard/start#additional_resources, implements an FTP server which Avnet has a bit of documentation on how to use it in section 5.8 of the Getting Started Guide they created: https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/zedboard/. Thanks, JColvin

Hi @harshana, This is very strange that the Power Good LED (LD13) is not glowing, but the board is still able to be detected and that the Ethernet LEDs are lit up. Are the user LEDs (LD0 through LD7) flashing in a pattern you configured or does it appear to be sporadic? More strangely, the picture of the Zedboard that you sent me has the 5 MIO jumpers all set to ground, so the board should only be configurable through JTAG. What is confusing to me is that as per page 15 and 16 of the Zedboard schematic, https://digilent.com/reference/_media/reference/programmable-logic/zedboard/zed_sch_rev_f1-public.pdf, the power good LED will only turn on if PG-ALL is enabled. But this pin only becomes enabled if all of the other voltage rails (which ultimately are only enabled if the 12 V supply is accurate) are correctly powered on. Additionally, the Ethernet LEDs should not be on when there is no cable plugged in as one only lights up when there is an Ethernet connection, and the other indicates activity. Neither of these conditions are true and both are internally controlled by the Ethernet controller chip (as opposed to the Zynq). By and large, the Zynq also operates at 3.3 V (which is what the Power Good LED uses), so the fact that the Zedboard shows up in the Vivado Hardware Manger is also unexpected. Unless there are additional details that I am missing, I can really only recommend the following: - Ensure you are using a 12 V power supply of sufficient wattage (I'm using a 12 V, 3 A supply) and that the supply is outputting the correct voltage - Check that there isn't any weird debris on the board - Put the Out of Box demo, available here: https://digilent.com/reference/programmable-logic/zedboard/start#additional_resources, onto the SD card - Set jumpers MIO 5 and MIO 4 to the 3.3 V settings so that the Zedboard will boot from the SD card - Set your VADJ jumper to either the 1.8 V or 2.5 V setting (to be clear, I strongly doubt this will do anything, but it won't hurt) - Turn the Zedboard back on and see if the Power and Done LED turn on and that you get activity through the UART port on J14 at 115200 baud If this does not change the behavior, then I do not know what is happening with the board and would recommend that you pursue at return (presuming the warranty is in place). Thanks, JColvin

Hi @erick.chang, I will ask the engineer most experienced with Adept for their insight into this question when I get the chance (they are out of office until October). My guess off-hand is that one of the enumeration calls are done in the background to populate the dropdown list in the top right, which then acts as the string/correct identifier for an DmgrOpen command of some kind when the Initialize Chain button is pressed, but I don't have any insight that I can claim as fact as to what the application actually does. Thanks, JColvin

Hi @SCguy, Unfortunately, Digilent has made the decision not to share this detail of our products. You can read more about it in this longer thread here: Thanks, JColvin