JColvin

Hi @HowardN, That is interesting me that there isn't a part selection for the Kintex 325T considering that Xilinx sells their own development board that also uses the 325T chip (the KC705 Evaluation Kit). I only have the Standard ML edition for 2023.1 but I am able to see and select the xc7k325tffg900-2 part both from the general Parts list and the Genesys 2 from the Boards list (after refreshing the catalog) since I had the Kintex 7 parts box checked during the Vivado/Vitis installation. If you also have the Kintex-7 parts included as part of your initial installation, then I am not certain why the part would not be showing up as a selectable option. Thanks, JColvin

Hi @HowardN, I don't have a license for the Genesys 2 for more recent versions of Vivado to be able to test this out though I'm not certain why it says you are unable to access the Genesys 2; I was under the impression the license just enabled bitstream generation; the Kintex 325T part selection is dependent on FPGA parts you have installed and you can freely add parts to your install via the Xilinx Information Center application (which comes with Vivado/Vitis) in its Manage Installs tab. If the Vivado License Manager / Xilinx Information Center applications don't let you manage the license in the way you are needing, nor the Xilinx Product Licensing Site (https://www.xilinx.com/getlicense, taken from https://www.xilinx.com/support/licensing_solution_center.html) then I would recommend posting on Xilinx's Licensing Forum, https://support.xilinx.com/s/topic/0TO2E000000YKXwWAO/installation-and-licensing?language=en_US, to get a more direct and accurate answer than Digilent can provide as Digilent does not create or handle the licenses, we just obtain them from Xilinx to go with products that need them. Thanks, JColvin

Hi @Jiri, I am not familiar nor have used the MATLAB flow so further questions about the connectivity and process flow would be best directed to MATLAB for the most accurate answers, but in terms of connecting over JTAG for FPGA-in-the-Loop you just need to use a microUSB cable as per the JTAG Connection Requirements table for Xilinx devices on the MathWorks site here: https://www.mathworks.com/help/hdlverifier/ug/what-is-fpga-board-customization.html#bt72ftg-1, since the Arty S7 already has an on-board USB-JTAG module implemented on it. Thanks, JColvin

Hi @bloggins666, You are correct that the Baremetal tutorial (https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi) XSA would only set up material for what is present in the Block Design; in this case the ARM processor, the 4 buttons, and the 4 LEDs. If you wanted to have access to all of the I/O pins on the PL side (and maybe anything extra on the PS side that isn't in the default configuration), you would need to create the associated design in Vivado, generate the bitstream for it, and then export the XSA which you would then import into Petalinux. Adding access to the most of the other GPIOs will be fairly trivial. Simply add the Arduino styled headers and RGB LEDs to the block design as done for the LEDs in first part of the Adding GPIO Peripherals step (https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi#add_gpio_peripherals_to_a_block_design). When right-clicking on each component in the Board tab to Connect Board Component, I would choose to create a new AXI GPIO IP (rather than an existing one). The second bit of that tutorial that shows how to manually assign pins is mostly there to show an alternate design flow within Vivado. For connecting things like the HDMI ports, what I would personally do is to take the existing hardware design of the Arty Z7-20 HDMI input demo (https://digilent.com/reference/programmable-logic/arty-z7/demos/hdmi-input) and then add in the other GPIO pins like I described in the above paragraph. Once the bitstream is generated and the .xsa is exported from Vivado, you'll be import it into Petalinux and create the BSP via petalinux-config if memory serves me. I've linked some additional resources on how this might be done in this post here: Let me know if you have any questions. Thanks, JColvin

Hi @bloggins666, No guide update yet, but letting you know that Digilent will be working on getting the guide updated within the next few weeks, hopefully by the end of November (the usual corporate resources/people having to wear multiple hats constraint strikes again); my co-worker got a project successfully created and launched an application in 2023.2, but noted that the step-by-step flow is quite different and the guide update is definitely needed. FWIW, they weren't able to get the --classic parameter to work via the Windows command line, but maybe Linux will have a different result. Thanks, JColvin

HI @C7AuD10, I have not heard of this particular type of failure before. The DONE LED (LD6)only lights up when the on-board FPGA determines that it is configured and outputs the appropriate active signal to enable that LED. The default boot configuration of the Cora Z7 (no jumper block loaded on JP2) would be over JTAG as there is a pull-down resistor on the two associated MODE pins (page 7 on the schematic, https://s3-us-west-2.amazonaws.com/digilent/resources/programmable-logic/cora-z7/Cora+Z7_sch-public.pdf), which does not automatically configure the board. All this to say that I don't have any insight on what might have happened to the board to get it into this state. The regulator heating up quickly is certainly not good of course, but that is (as far as I understand) completely isolated from the state of the DONE LED. Vitis also doesn't have any sort of control over this behavior as well to get it into a non-functional fail state. I would recommend to get the board replaced. If you purchased the board directly from Digilent, send me a private message with: - Board Serial number (underside of the board on the barcode sticker starting with DA) - Order Number - Purchase Date - preferred email So I can get the RMA process started with our Sales team. They will contact you for any additional details they need that I don't have access to (such as shipping address). If you instead purchased the board from a distributor (Newark, Amazon, etc), you will need to contact the distributor to determine their replacement process; they will then contact Digilent separately for their own RMA. Feel free to point them to this thread as evidence of having worked with Digilent. Thanks, JColvin

Hi @Sai Teja Palla, This thread should help you: Thanks, JColvin

Hi @bloggins666, I took a look at the Vitis Release Notes (https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/vitis.html) for 2023.2 that were published yesterday that there is a new GUI within Vitis. I don't think anybody at Digilent has gotten a chance to download 2023.2 yet, but considering that AMD/Xilinx is listing the new GUI as the first bullet point of highlighted features, we'll be sure to get the Baremetal Software guide updated as appropriate. Thanks for the heads up, JColvin

Hi @kkcheon, What revision of the Zedboard do you have and what files are present on the SD card that came with the Zedboard? They should be matching the materials in the sd_image folder that is within the Out of Box demo available on the Zedboard Resource Center here: https://digilent.com/reference/programmable-logic/zedboard/start#additional_resources. Thanks, JColvin

Hi @s.gafoor, I'm not certain what other SD card files you might be referring to. Did the Zedboard not boot up as per the instructions in the readme file that was included in the sd_image folder? Thanks, JColvin

Hi @peterhu, The VCC5V0 and VCC1V0 working are okay because they are enabled first by the power sequencer, but your question reminded me that the 1.8 V rail was at 0 V which didn't fully make sense to me as the 3.3 V rail is enabled by the power sequencer after the 1.8 V rail. So I double checked with the design engineer on their assessment and learned that they had missed the 1.8 V detail the first time around which should, of course, be working if only the 3.3 V rail was damaged. As far as I can tell, the 1.8 V rail is only used to supply the USB OTG chip and one of the Zynq PS banks which handle the Ethernet and Micro SD card, but based on your description none of these items were directly involved with the work you were doing. I'll send you a PM for some additional instructions to pursue an RMA. Thanks, JColvin

Hi @peterhu, After talking with the design engineer, they suspect that one of the ICs on the 3.3 V rail has been damaged as opposed to the power regulator, though finding the component in question will be tedious. If you wanted to pursue fixing this, I would personally try to see if I can identify one of the 3.3 V powered ICs that either have a short or greatly reduced impedance between their ground and Vcc pins. Let me know if you have any questions regarding this. Thanks, JColvin

Hi @Chr, Digilent does not have any specific SFP+ module recommendations with regards to connecting the Genesys ZU to other devices. We worked, of course, to design that interface to respect the SFP+ specifications, so it should in principle would work many different modules. In terms of initial testing since you mentioned this is the first time you are using such an interface, Digilent did use both the Molex 74765-0906 SFP+ 10G loopback module w/ 0dB attenuation and Molex 74765-0904 SFP+ 10G loopback module w/ 5dB attenuation as loopback modules to connect and test the TX and RX paths on the Genesys ZU. Thanks, JColvin

Hi @AstroKevin, My understanding is that this is intentional, much like none of the other tools such as the Logic Analyzer or WaveForm Generator on other T&M devices are also not enabled upon a workspace and are instead in a "Ready" state. Power supplies in particular are tricky to reason having turn on immediately upon opening the workspace (at least by default) because there is no way for WaveForms to know if the attached device is physically set up and ready to go and not about to inadvertently damage some external peripheral. Attila, whom you have been working with, would be best able to comment on this feasibility (though he is in a European timezone so he likely won't reply till tomorrow). Realistically I would expect a function through WaveForms SDK (which you inquired about on your other thread) to be the way to approach this immediate enable/configuration, especially with running multiple devices, but I don't believe this currently exists. Thanks, JColvin

Hi @Arthur3598, Correct, because of the half-duplex nature the receiving and transmitting lines are tied together through a termination resistor. If a Driver Enable is set high on one node, some other node will not be able to transmit data, so you would only want to keep DE high on the Pmod RS485 when you wish to transmit data and then either put DE low or into tri-state (as there is a pull-down resistor implemented on the Pmod) while not actively transmitting data. The ADM2582E datasheet (https://www.analog.com/media/en/technical-documentation/data-sheets/ADM2582E_2587E.pdf) doesn't do a great job at explaining this; I personally found the AN-960 (https://www.analog.com/en/app-notes/an-960.html?doc=ADM2582E_2587E.pdf) to be more helpful for using the module in half-duplex. Let me know if you have any questions. Thanks, JColvin

Hi @Caleb Young, You should not have the V- (the negative power supply) connected to ground. The only probably instance where it might be 'connected' would be through a capacitor to help with stability or have a dedicated load as the intended path. I'm not able to tell from the provided picture what IC you are using, nor am I certain why you have both ends of Scope Channel 1 grounded, or what the red (+) rails on breadboard are intended to be connected to, but regardless the V- supply being directly connected to the same blue (-) rail as the ground on the breadboard is what is causing the overcurrent error to appear in WaveForms. Let me know if you have any questions. Thanks, JColvin

Hi @philipg, Yes, it is compatible with the Electronics Explorer (I just confirmed it on my desk). Unless some drastic software change negates this, my understanding is that all versions of WaveForms are planned to be backwards compatible with existing or retired Digilent Test and Measurement hardware. Thanks, JColvin

Hi @Dr. VM, I presume you are just wanting to communicate with the Nexys A7 over a serial terminal. You can do this through the on-board USB connection (J6, near the power switch, more details in the reference manual here: https://digilent.com/reference/programmable-logic/nexys-a7/reference-manual) and send data to and from board over your preferred serial terminal (HyperTerminal, Putty, TeraTerm, etc). As the Nexys A7 is an FPGA, you'll need to configure it to process or send the UART data. Both the Nexys A7 GPIO demo, https://digilent.com/reference/programmable-logic/nexys-a7/demos/gpio, and the Getting Started with Baremetal Software guide, https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi, set up the Nexys A7 to send data over the serial terminal when an event occurs (usually a button press). You can of course also set up some external UART loopbacks, such as mentioned here https://forum.digilent.com/topic/25288-looking-for-a-uart-programmable-logic-example-project-for-arty-s7-with-vivado-20222/#comment-75095, where you can take a character from the host computer and have it sent out over an external Pmod pin as well as being able to take external UART data coming into Pmod pins and send them back to the host. Let me know if you have any questions. Thanks, JColvin

Hi @Caleb Young, What version of WaveForms are you using? Are you just using the Analog Discovery 2 over USB, or are you also using an external 5 V power supply to power the AD2? Could you attach a picture of your setup? Also, you don't actually have V+ and V- connected to one of the grounds on the Analog Discovery 2, right? That would very much be creating a short circuit would immediately trigger the overcurrent condition. If you wanted to test to see if V+ or V- was outputting the correct voltage, you would need those outputs to be floating (not connected to anything) or connect one of the Scope channels (solid orange or solid blue wire) to measure their outputs. If you just have the V+ connected to a breadboard and no other load on it (no path for current to flow), then in principle the AD2 should not be immediately triggering an overcurrent condition. Let me know what you learn. Thanks, JColvin

Hi @Samuel Ulehla, There is no debouncer integrated for the push buttons or switches on the MyDigital Protoboard. The outputs have both a 2.2k ohm pulldown resistor and a 200 Ohm series resistor to the output signals, with the 5 V rail being 'visible' once the button is depressed. Regrettably I don't have permission to simply share the schematic of this particular module. As for implementing debouncing, you can either do it through external capacitor or through software debouncing. Depending on how the digital inputs of the attached controller board detect high and low signals, particularly at 5 V logic, I'd likely be more inclined to do it in software. Let me know if you have any questions. Thanks, JColvin

Hi @Ozilate, In general, disconnecting the board before powering it off (or closing a project or similar) should not cause this behavior. Based on what you have described there are a couple of potential points of failure: 1. USB cable died/was damaged so that it no longer supports data. This is unlikely, but I have had cables die before so it's worth checking with another cable to rule this out. 2. Trying a different USB port. I have a few ports on my computer that are "temperamental" for the lack of a better word about which device and cable combination they work with. 3. EEPROM on the Basys 3 somehow got messed up. Another unlikely possibility, but like the above two it can happen. Easiest way to check this is by look to see what the Bus reported device description is in the Properties (post with some additional details here: https://forum.digilent.com/topic/21713-brand-new-basys-3-user-cant-get-vivado-to-see-it/#comment-62685). If you are not able to see the board at all in the Windows Device Manager, this would point back to a cable connection problem. Let me know what you learn. Thanks, JColvin

Hi @peterhu, Could you let know in better detail about how you were using your Eclypse Z7 when it got damaged? The design engineer suspects in this situation that the regulator might be fine and that it is different ICs that have been damaged, but we'll need some more information to help better troubleshoot this. Could you also let me know what test points you measured to determine the regulator was damaged (this post, https://forum.digilent.com/topic/25689-rma-request/, has reference list of useful capacitors to measure). Thanks, JColvin

Hi @Patrick J. Mills, I asked the design engineer about this and received the following information. - When the USB controller is held in reset the current consumption is ~20 mA - When the USB controller comes out of reset and enumerates on the USB bus it's ~87.5 mA - When both channels are being used, the worst case current draw on Vdd is around 115 mA with 90 mA typical. You didn't ask this, but they also let me know that for Vref the current draw at 30 MHz is 12.5 mA typical and 35 mA max. Let me know if you have any questions. Thanks, JColvin

Hi @peterhu, You mentioned that measured the Vcc end of the JB pin. Could you describe a bit more of what you mean by this? Do you mean that you had an SMA cable connected to the Zmod Scope and then somehow measured a Vcc on the underside of the board with one of the clips? Or something different? What gain setting were you using when you were testing the Eclypse Z7? Thanks, JColvin

Hi @nes, I'm not certain which board you are using, but in general it would not be possible to use external flash memory in place of on-board memory to boot up/configure an FPGA on start up because it will not be connected to the correct FPGA pins, as is the case for the on-board flash chip on the Arty A7 (page 6 of the schematic, https://digilent.com/reference/_media/programmable-logic/arty-a7/arty-a7-e2-sch.pdf). I haven't done any checking of voltage, size, clock frequency, and command compatibility with the Microchip flash you linked to see if it would be technically possible to replace on-board N25Q128 flash memory, but the potentially larger hurdle would be that the memory chip you mentioned is not in Xilinx's UG908 list of supported memory configuration devices: https://docs.xilinx.com/r/en-US/ug908-vivado-programming-debugging/Configuration-Memory-Support. There are some instructions within that same user guide on how you would create your own memory support, but I haven't look through them to ascertain the difficulty of such an endeavor. Thanks, JColvin