JColvin

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Everything posted by JColvin

  1. Hello, I have asked some of our applications engineer about this; they'll get back to you here on the Forum. I don't know if this will solve your problem, but you may want to take a look at this thread on our Forum to see if the suggestion there helps you. Thanks, JColvin
  2. A customer on our website asked the following question: Hi,I have a problem programming my SPI bootloader project on the flash (N25Q032A) of my CMOD A7 35T. I followed all these guides: https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/starthttp://www.xilinx.com/support/answers/64238.htmlhttp://www.xilinx.com/support/answers/63605.htmlBriefly, my project is placed (through its linker script) into the SRAM CELLS of the board, and the bootloader into the BRAMs. Now, programming the FPGA with the bootloader .elf it works (the bootloader actually move the project data from flash to the SRAM CELLS and then it starts its execution), but I can't program the flash with the bootloader too (programming the flash with the download.bit created with "Program FPGA", as written in every guide). I also tried to create a .mcs file containing both FGPA configuration (download.bit) and the SREC of my project, but it didn't work. The TCL command to create the .mcs that I used in Vivado is:write_cfgmem -format mcs -size 4 -checksum FF -interface spix4 -loaddata "up 0x0 /path/to/download.bit up 0x00C00000 /path/to/peripheral_test.srec" -force peripheral_testI really need to write the FPGA configuration files to the Flash. How can I solve this problem? Thank you in advance, The response is below.
  3. Hello, I'm sorry to hear that your Arty is not being recognized. The two most common issues that we see that cause this are that the cable drivers did not install correctly and need to be re-installed or that the USB cable itself is the problem and needs to be replaced. You can find more information on this on these two other threads in our Forum here and here. Please let me know if you have any more questions. Thanks, JColvin
  4. A customer on our website asked the following question: I bought an Arty board last summer. I've finally installed and learned Vivado. I'm now using Vivado routinely on a Xilinx VC707 with success. I have attempted multiple ways to program my Arty board with no success. At present, the Arty board will not even register a COM port on my computer. I'm inclined to believe this board could be defective. I could use some assistance in getting this board running or replacing it with a working board. The response is below.
  5. Hello, I have placed your question in the appropriate section of the forum where the engineer best suited to help you will be able to see and respond to your question. Thanks, JColvin
  6. A customer on our website asked the following question (during the time when the Forum was temporarily down): Hello all,We have a problem with your software Waveforms 2015 on Windows 7.The data can be recorded without problems but when the menu item File/Save as or File/Export is pressed, the software stops working and a message is shown, which states (without error code), that the program has stopped working. In the Windows Event manager the exception code is 0xc0000005.Starting waforms safe mode doesn't help with menu item save as; the item export now shows the data but the data still cannot be saved.Any help would be appreciated. The response is below.
  7. Hello, I'm not sure which application you are referring to, but you can use LINX 3.0 to have your Raspberry Pi 2 run LabVIEW Real Time and VI's without a connection to a host computer. Check out out this other comment in our Forum for more details. Thanks, JColvin
  8. A customer on our website asked the following question: I need to now if with this application, I can using a stand alone executable labview VI in a Raspberry PI2. Or I need to have a remote other standard PC where the same VI run? Thanks The response is below.
  9. JColvin

    HS3 HW_Server trouble

    Hello, I have asked some of our applications engineers about this; they will get back to you here on the Forum. Thanks, JColvin
  10. JColvin

    HS3 HW_Server trouble

    A customer on our website asked the following question: Hello,I have Digilent HS3 and it has stopped enumerating as a HW_SERVER in Vivado.I have the HS3 connected to my device, however it cannot connect to the FPGA because the HS3 HW_SERVER is not running.Could you please provide some troubleshooting steps please?Thank you, The response is below.
  11. JColvin

    Nexys 4 DDR question

    Hello, I guess the shortest answer is that logic slices and logic cells are two different things. The longer answer is that a logic cell is an abstraction, kinda like how a dozen means 12. A logic cell isn't actually a "thing" inside the FPGA; it is a way to measure the device capacity where a 4-input LUT and a flip-flop equals a logic cell. However, as an abstraction it does not truly reflect the actual size of the FPGA, it's just a convenient measurement that is somewhat close if you're okay with glossing over some design specific details (that I'm not personally familiar with). A logic slice on the other hand is more architecture specific and accounts for more details. For Xilinx's 7-series FPGAs (as per DS180) a logic slice is made up of 4 LUTs, 8 flip-flops as well as any associated multiplexers and arithmetic carry logic. Two of these slices make up a configurable logic block (CLB). Admittedly, these logic slices and CLBs can also seem somewhat vague, but in the end "are the main logic resources for implementing sequential as well as combinatorial circuits" as per Xilinx's CLB User Guide for the 7 Series FPGAs, so that's why our product page lists the 15,850 slices rather than the logic cells. Let me know if you have any more questions. Thanks, JColvin
  12. JColvin

    Nexys 4 DDR question

    A customer on our website asked the following question: Hi there,I noticed on the product page for the 'nexyus 4 ddr' board the spec list:*************************Features:Xilinx Artix-7 FPGA XC7A100T-1CSG324C15,850 logic slices, each with four 6-input LUTs and 8 flip-flops **************************Just wondering how accurate this is as when I researched the 'Xilinx Artix-7 FPGA XC7A100T' FPGA it claims to have 'logic cells: 101,440'. Could you please clarify this for me.RegardsMarcus The response is below.
  13. JColvin

    Cmod S6 and LabVIEW

    Hello, Unfortunately, LabVIEW does not natively target the Cmod S6. I will ask some of our applications engineers to see if using EPP will help though. Thanks, JColvin
  14. JColvin

    Cmod S6 and LabVIEW

    A customer on our website asked the following question: CMod S6. Can the Labview software talk to your S6 usb driver? I used this S6 and wrote the Verilog for the Extended parallel port inside Xilinx. It works well. So can the labview write to my Xilinx registers? The response is below.
  15. Hello, I have asked some of our applications engineers about this; they will get back to you here on the Forum. Thanks, JColvin
  16. A customer on our website asked the following question: Dear Sir,Could you check the Page 9 of 5 Mechanical Information?Please advise me about the product size tolerance.https://reference.digilentinc.com/_media/jtag_smt2/jtag-smt2_rm.pdf The response is below.
  17. Hello, Unfortunately, Digilent does not have a similar power supply that is compatible with the SUME. I looked around online for a similar supply in the "brick" form factor but wasn't able to come up with anything useful. If you want to power the SUME without relying on the server to provide the power, my personal (unofficial) recommendation would be to get a separate PSU (it'll come with the appropriate cabling) to power the SUME. If you are only powering the SUME off of the PSU, the PSU shouldn't need to be much more than 250W (to be on the safe side). You would need to short two of the pins on the power supply as per the power section of the SUME reference manual. I have asked some of our applications engineers to provide further input on this. Thanks, JColvin
  18. A customer on our website asked the following question: Hi,For our research project at USI Lugano (CH), we need to install a NetFPGA SUME board inside a server, which unfortunately does not provide any 6-pins/8-pins power connector.Is there any power adapter, such as this one: http://store.digilentinc.com/60w-pcie-12v-5a-power-supply/which is also compatible with NetFPGA SUME board?Is there any other solution that allows to power the NetFPGA SUME, without relying on the server?Thank you! The response is below.
  19. Hello, I have asked some of our applications engineers about this; they will get back to you here on the Forum. Thanks, JColvin
  20. A customer on our website asked the following question: Dear Sir/Madam,We want to buy Cmod S6 and Cmod A7 products but I could not see operating temperatures of these products. Are these products suitable for -40, +85 centigrade degrees? If not, do you have any alternatives which satisfy this requirement?Best regards, The response is below.
  21. Hello, If I'm reading your question correctly, it sounds like you are using the Synopsis metaware to change the JTAG clock speed, so you would likely need to contact Synopsis for the correct command to set the clock speed. However, I will ask some of applications engineers to see if they are aware of a way to change the JTAG clock speed. Thanks, JColvin
  22. A customer on our website asked the following question: Hi,We bought some Digilent USB JTAG cables as the website http://store.digilentinc.com/jtag-usb-cable/ and connect to our FPGA which inlcues a ARC5 CPU. We typed the command line "mdb -hard -digilent -off=check_dcache_lock_bug -nogoifmain -prop=dig_speed=100000 -connect_only" and hope the JTAG TCK is around 100KHz, but to measure the TCK by scope, the clock is always 700KHz, not 100KHz. Our goal is to adjust the TCK to 5MHz or 10MHz, could you please teach us to do the right setting? The response is below.
  23. Hello, Unfortunately, Digilent does not have any projects for the WF32 that use Microchip's MPLAB X. I took some extra time and found there are some examples for the WF32 using MPLAB Harmony done by Microchip here, but I am not personally aware of anything beyond that. Thanks, JColvin
  24. A customer on our website asked the following question: where can I find example project that can help me learn chipKit WF32 under MPLAB X IDE? The response is below.
  25. Hello, Truthfully, the Xilinx Forums would be a better location to answer this question, but I'll see what I can do to help. I guess the first question I have is did you ever have a ChipScopePro license? If so, did you ever activate it? If you could attach the xinfo file that would also be helpful. You can generate the xinfo.txt file by going to the start menu -> start -> Xilinx ISE design suite -> Accessories -> xinfo system checker. Thanks, JColvin