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Everything posted by JColvin

  1. Hi @smurf, You can use a WebPack version of Vivado (that is what I am using). Our guides for 2020.1 are still being polished, but you can see a guide for Getting Started with Vitis on our Wiki page here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/2020.1/getting-started-with-ipi. The release for this particular example is not formally ready for a release (I emailed the creator about this a few days ago). What you will need to do for this project to work is to generate a bitstream and then you will be able to export the hardware so you can work with it in Vitis. The guide I linked above explains how to do this step by step starting in this section here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/2020.1/getting-started-with-ipi#build_a_vivado_project. Let me know if you have any questions about this. Thanks, JColvin
  2. Hi @Iceman2020, You are correct. I have edited the original posting to now contain this correction. Thank you, JColvin
  3. Hello @tuskiomi (and other curious readers on this thread), I confirmed with our Sales Manager that Digi-Key does not do any academic discounts (and for reference, very few distributors will do academic discounts; the only one that I am aware of is Trenz Electronics, but that is only for German customers. But I don't think they have any Genesys 2's in stock even if you do happen to be based in Germany). I am waiting for confirmation our FPGA Product Manager that the timeline listed on the Genesys 2 store page, i.e. boards slated to be shipping again from the Digilent store directly in September 2020, is the most up to date information. Edit: got confirmation that the September 2020 date on the store page is still accurate. Thank you, JColvin
  4. I'm not too experienced with VHDL so I'm probably wrong, but I did see that the N number of 8-bit words listed between the HsSerializer entity listed in HsSerializer.vhd and the HsSerializer component in the HsUartTx.vhd file did not match. But I'm not sure if that difference contributes to the 16% improvement you found.
  5. Hi @Ralph Kruger, Which board do you have? Thanks, JColvin
  6. JColvin

    FPGA for a beginner

    Hi @rashimkavel7, There is a nice thread on here that discusses some of our different boards here: https://forum.digilentinc.com/topic/2576-hello-digilent-community/. As for implementing an FFT, a number of people use the IP core from Xilinx though you can do it otherwise as per these couple of threads here and here, (with many more threads on the FFT topic elsewhere on the forum). I'm not certain what you are envisioning when you say "proper linux support". Digilent has some Petalinux projects for a number of our Zynq boards but they tend to be restricted to certain versions of Petalinux. Thanks, JColvin
  7. Hi @Soham Kulkarni, I have sent you a PM with some instructions on how to restore the EEPROM. Thanks, JColvin
  8. JColvin

    CMOD S7

    Hi @BParsons, Digilent has made the choice to keep that part of the circuitry on our boards proprietary. Thank you, JColvin
  9. Hi @wpless, The Petalinux project for the Eclypse Z7 is available on our GitHub here: https://github.com/Digilent/Eclypse-Z7-OS. Thanks, JColvin
  10. Hi @Iceman2020, I apologize for the delay, it look longer than expected. I have attached the two pdfs. Let me know if you have any questions. Thanks, JColvin Statement of Volatility Cmod A7-35T.pdf Statement of Volatility Cmod A7-15T.pdf
  11. JColvin

    Cora Z7 Pmod RS485

    Hi @sverhoff, It will be more complex that to simply connect Xilinx's AXI UARTLite IP to the Pmod RS485 because that IP does not natively support the RS485 protocol. There is a patch posted on a Xilinx forum here though: https://forums.xilinx.com/t5/Embedded-Development-Tools/Feature-Request-UARTlite-with-RS485-Driver-Enable-output-signal/m-p/689335#M39324. There is also another post that may be of interest to you here: https://microelk.azurewebsites.net/ZynqLnxRS485/ZynqLnxRS485. Thanks, JColvin
  12. Hi @fkropat, I have sent you a message as well with the Digilent contact information. Thanks, JColvin
  13. Hi @rpudelko, Additionally, it looks like you are using Vitis, so I would recommend following our updated guide for this here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/2020.1/getting-started-with-ipi. Let us know if you have any questions about this. Thanks, JColvin
  14. Hi @borhan, What board are you using so I can help you restore the material? As for preventing the problem in the future, the only recommendation I have would be to maintain extra caution when configuring different FTDI devices with FTProg or other similar programmers as they, as you and many others have found out, can very easily overwrite the configuration on a different board and not everything is easily reconfigured. It's an extra step in the process, but I would disconnect boards that you don't intend to program when using these types of programmers to prevent accidents. Thanks, JColvin
  15. Hi @manboy, I asked another engineer more familiar with the Pcam about this. Thanks, JColvin
  16. Hi @BT12, I apologize for the delay. Our projects that we have for the Genesys ZU on our GitHub, https://github.com/digilent?q=genesys+zu&type=&language=, are designed to work with 2019.1, not 2018.2, though the board files should not be picky about the Vivado version. What errors do you get in the during the Run Block Automation process? And what Xilinx evaluation board are you referring to? Thanks, JColvin
  17. Hi @ennegi, I apologize for the delay. My understanding based on the ESP32 reference manual, https://reference.digilentinc.com/reference/pmod/pmodesp32/reference-manual, is that the program loaded on it is AT Instruction Firmware, which is set up in slave mode that sets the top row of pins to UART. To use the pins as a SPI header, you would need to load custom firmware that makes use of this SPI header. Updating this firmware is somewhat described on this ESP32 forum thread here: https://esp32.com/viewtopic.php?t=5136. Digilent doesn't have any custom firmware that we have created for the module. Let me know if you have any questions about this. Thanks, JColvin
  18. JColvin

    ZYBO LED demo not working

    Hi @mainak, I would instead use the Pmod GPIO IP, https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/PmodGPIO_v1_0, since the tutorial you linked is for WS2812 styled LEDs, not the on-board LEDs or the Pmod 8LD. The on-board LEDs you can control through the block design as explained in this tutorial here (or through HDL). The tutorial you linked is also for the original Zybo and not the Zybo Z7-10 which are different boards and will have different pinouts. The reason you do not find launch SDK is because Xilinx got rid of SDK in favor of Vitis starting in 2019.2. The second tutorial I linked walks you through how to use Vitis instead. Let me know if you have any questions. Thanks, JColvin
  19. Hi @idraney, We don't have a direct examples, though you could look at the preset for the Cmod A7 board file to see what what is specifically done there: https://github.com/Digilent/vivado-boards/blob/master/new/board_files/cmod_a7-35t/B.0/preset.xml. Thanks, JColvin
  20. Hi @g3333t, It is possible to do this. You would need to do some networking to get this set up though. One option would be to open a port on your router and then forwarding the traffic to the OpenScope MZ. At that point you would just need an address that is accessible via the internet at large which you put into WaveFormsLive when connecting via network, which will be dictated by your ISP. Alternatively, you could set up a VPN connection between your remote computer and a VPN server on your home network that has the OpenScope MZ/WaveFormsLive available and SSH into it, but that would be a bit more work to get going. Thanks, JColvin
  21. Hi @Tim S., I have passed your feedback on to the engineers who handle our GitHub material. Thank you, JColvin
  22. JColvin

    liblinxdevice dll

    Hi @Rcam, I don't know where the source for the .dll is or where it might be. However, LabVIEW 2020 Community Edition should work just fine with the WF32. I just ran a VI on the WF32 with the Pmod TMP3 VI. I had to use the LINX Firmware Wizard first to configure the board to be able to talk to LabVIEW in the first place, but it otherwise worked without issues. The only way that I am aware of for a buffer of values/commands that could be sent would be to create a Custom Command (https://www.labviewmakerhub.com/doku.php?id=learn:tutorials:libraries:linx:misc:custom_command_example) where you effectively send out N pieces of data and the receiving board parses those different incoming values as different types of commands to execute, probably via a switch-case setup. Thanks, JColvin WF32_TMP3.vi
  23. Hi @manboy, If you want to use a Pmod port you would need some sort of level shifter; it doesn't have to be the Pmod level shifter (Pmod LVLSHFT), but it would work for translating the voltage from 3.3V to 1.8V. Vivado will probably complain that about those IO pins suited for clocking, but I believe it should still work at 24 MHz. I would probably use one of the differential Pmod headers (JC or JD) as they do not have series resistors to hinder clocking speed. Alternatively, there are some clock pins on the FMC header (which will also support 1.8V via the VADJ jumper). Let me know if you have any questions about this. Edit: Though it looks like zygot responded a few minutes before I did with very similar information. Thanks, JColvin
  24. Hi @Tim S., Thank you for sharing this project! Do you mind if we link to this post as a community project on different Digilent Wiki pages, such as on the Zybo Z7-20 and Arty A7 Resource Centers? Thanks, JColvin
  25. Hi @Goodbye, I apologize for the delay; to clarify, you are inquiring about the material on the FTDI chip downstream of the microUSB port (J13)? Or the USB HID port and it's PIC24 (J15)? Presuming it is the first one, there is not a way to change the firmware through Vivado or installed Digilent plug-ins, though it is very possible to overwrite the EEPROM on the device with FTProg and cause it to no longer be recognized as a programmable device by iMPACT or Vivado. Thanks, JColvin