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JColvin last won the day on November 19

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About JColvin

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  1. Hi @Lorenzo, Most projects on the Arty that use SDK (and hence MicroBlaze) tend to need DDR memory (and the MIG to control it) since the local BRAM is too small to run the application. This is the point of the SPI SREC bootloader, to pull the application out from QSPI and to run it on the DDR. The bootloader itself will be run on BRAM (provided that has been made small enough to actually fit on BRAM since it is too large with the default SDK settings). This is described a bit more throughout section 9.3 in the tutorial you linked. There is also the bit of making sure the the bootloader in QSPI doesn't overlap with the actual application also in QSPI (otherwise the application won't work since it's been partially overwritten). I haven't gotten to look at the other setting just yet for the generate bitstream, but I will let you know. I believe the steps listed section 8.3.5 should be fine though. Thanks, JColvin
  2. Hi @TKl, Yes, WaveForms supports python as a scripting option, which I believe LabVIEW is able to call and execute for you through a VI. Otherwise, I believe (I don't know the internal details for certain) the Analog Discovery ToolKit for LabVIEW uses some of the DLL material, though it does not have all of it (nor does it work on newer versions of LabVIEW). I do know that there is an alternate LabVIEW and Analog Discovery 2 driver that has an associated Instructable available here. Let me know if you have any questions about this. Thanks, JColvin
  3. Hello @funlu, Unfortunately, we do not generally provide netlists for our products. There is some more information on this thread here. Let me know if you would like to pursue this further. Thanks, JColvin
  4. Hi @Guru Prasanth S, The Option 5 on the start/stop video streaming into Video Framebuffer does not turn off the display. It instead no longer sends video frames to the display so that you effectively have a screenshot. This can be more easily seen by having a moving object (such as a mouse pointer) on the display, then pressing the 5 to stop any further frames from being put into the buffer, and then moving the mouse to see that the mouse pointer no longer moves on that display. Let me know if you have any questions about this. Thank you, JColvin
  5. Hi @AlGee, What version Vivado and specific board do you have? Are you running Vivado and Xilinx SDK 2018.3 and using the Arty A7-35T still? I wen through the tutorial with those pieces of hardware, but was unable to readily reproduce the error you encountered. I took a look at some other Xilinx threads, such as this one, and it seems that a different compiler could be causing some issues, though I do not know for certain if this is the case. Most commonly, this seemed to be WinAVR, so I would recommend attempting to uninstall that first. Let me know what happens. Thanks, JColvin
  6. Hi @Bill_H, Not that I am aware of. The Pmod MTDS has it's own IP core that Digilent created available here: https://github.com/Digilent/vivado-library/tree/master/ip/Pmods/PmodMTDS_v1_0. The main thing is that the MTDS has it's own embedded processor that the host board communicates with over a pre-determined set of SPI commands, so v_osd IP from Xilinx will probably not work in this case. Let me know if you have any questions about this. Thanks, JColvin
  7. Hi @D4ILYD0SE, I haven't used this importer before (Digilent works with their own Digilent Core now), but I tested nearly the same setup (exception is that I have MPLAB X 3.60 rather than a newer version, all other pieces the same version as you), but encountered the same error. The way that project is copied to a different location so that can be imported seems strange to me since I would expect that it needs more information to import, but that is what the tutorial states, so I followed it. My guess now is that either the newer chipKIT Cores are no longer compatible with the importer tool that has a 2017 date (perhaps unlikely based on my limited knowledge of how cores are designed, but I don't know this for certain) or the Arduino IDE had something changed. If I get a successful import on one of these older revisions, I'll let you know. Thanks, JColvin
  8. Hi @ARP, I apologize for the delay; I'm not personally familiar with the API calls, though if haven't seen it already I do know there is a list of the available DJTG commands available in the DJTG Programmer's Reference Manual within the Adept SDK documentation. I have also asked another engineer for some feedback on this thread as well. Thanks, JColvin
  9. JColvin

    Vitas tutorial

    Hi @Sven K, I would recommend taking a look at the Nexys 4 DDR (now branded as Nexys A7) Resource Center: https://reference.digilentinc.com/reference/programmable-logic/nexys-4-ddr/start where we have a number of tutorials and examples available for Vivado for HDL only projects. I don't believe we have directly tried working with Microblaze through SDK (now Vitis) specifically, though if you wanted to it would be similar process as done with a Zynq chip (much like in this thread). Let me know if you have any questions. Thanks, JColvin
  10. JColvin

    I bricked my CMOD-A7

    Hi @Decanter, Hamster listed their solution in their own self-marked best answer in this same thread; here's a direct link to the comment: https://forum.digilentinc.com/topic/19036-i-bricked-my-cmod-a7/?do=findComment&comment=51076. For your particular case, what do you mean by a "dead Cmod"? Do the lights turn on when you plug it in? Can you see it in the Digilent Adept software? Thanks, JColvin
  11. Hi @jrrk, You are correctly, the image for showing the J2 header is has the ground pin and the power pin incorrectly labeled. As per the Pmod BT2 schematic, VCC is on pin 5 and Ground is on pin 6. I will make sure this gets corrected.on Out of curiosity, why are you using the SPI header? That header is really only used to upgrade the firmware loaded o the RN-42 module. Thanks, JColvin
  12. Hi @LuisMP, While most of the Digilent made tutorials (such as the Getting Started with Vivado) are made in Verilog (I don't think there is a particular reason for the choice in using Verilog), but in addition to the resources already mentioned by @zygot, you can find a few VHDL examples for the Basys 3 on the Digilent Github here. Thanks, JColvin
  13. Hi @Ondrej, I have moved your feedback to a different section of the forum where the creator of the WaveForms software will be able to see it directly. I'm glad to hear you appreciate the Analog Discovery 2 and the WaveForms software! Thanks, JColvin
  14. Hi @YellowYoung, Truthfully, I don't know if this is the case; J16 just happened to look the most convenient with regards to physical connectivity to the Pmod. If you are instead using external wiring and routing your specific pins as well as an exposed VADJ pin that is providing 3.3V to the power pin of the Pmod, then in theory that would be electrically compatible. The user guide also shows that the VADJ "power good" LEDs also work with 3.3V, so I do not think there is anything physically preventing this, though I have not tested this for myself as I have not used the board. I presume that in your .xdc file, you updated the IO voltage standard that you are using? Thanks, JColvin
  15. Hi @Mark Dunkle, If you attach a supported board (such as the Analog Discovery 2) a pop-up will appear asking you if you would like to connect to it; this will take you out of demo mode. If this pop-up does not appear, you can click on the "Discovery 2 DEMO" box that is in the bottom right hand corner of the GUI, you will be able to select your attached hardware from there (or choose a different board to demo). If you are are looking to test out the other tools besides the Scope, click on the Welcome tab with the green plus sign (just above the "File") button. Let me know if you have any questions about this. Thanks, JColvin