JColvin

Administrators
  • Content Count

    4038
  • Joined

  • Last visited

  • Days Won

    157

JColvin last won the day on August 3

JColvin had the most liked content!

About JColvin

  • Rank
    Forum Moderator
  • Birthday April 22

Profile Information

  • Gender
    Male
  • Location
    Pullman, WA

Recent Profile Visitors

13335 profile views
  1. Hi @smurf, You can use a WebPack version of Vivado (that is what I am using). Our guides for 2020.1 are still being polished, but you can see a guide for Getting Started with Vitis on our Wiki page here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/2020.1/getting-started-with-ipi. The release for this particular example is not formally ready for a release (I emailed the creator about this a few days ago). What you will need to do for this project to work is to generate a bitstream and then you will be able to export the hardware so you can work with it in Vitis. The guide I linked above explains how to do this step by step starting in this section here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/2020.1/getting-started-with-ipi#build_a_vivado_project. Let me know if you have any questions about this. Thanks, JColvin
  2. Hi @Iceman2020, You are correct. I have edited the original posting to now contain this correction. Thank you, JColvin
  3. Hello @tuskiomi (and other curious readers on this thread), I confirmed with our Sales Manager that Digi-Key does not do any academic discounts (and for reference, very few distributors will do academic discounts; the only one that I am aware of is Trenz Electronics, but that is only for German customers. But I don't think they have any Genesys 2's in stock even if you do happen to be based in Germany). I am waiting for confirmation our FPGA Product Manager that the timeline listed on the Genesys 2 store page, i.e. boards slated to be shipping again from the Digilent store directly in September 2020, is the most up to date information. Edit: got confirmation that the September 2020 date on the store page is still accurate. Thank you, JColvin
  4. I'm not too experienced with VHDL so I'm probably wrong, but I did see that the N number of 8-bit words listed between the HsSerializer entity listed in HsSerializer.vhd and the HsSerializer component in the HsUartTx.vhd file did not match. But I'm not sure if that difference contributes to the 16% improvement you found.
  5. Hi @Ralph Kruger, Which board do you have? Thanks, JColvin
  6. JColvin

    FPGA for a beginner

    Hi @rashimkavel7, There is a nice thread on here that discusses some of our different boards here: https://forum.digilentinc.com/topic/2576-hello-digilent-community/. As for implementing an FFT, a number of people use the IP core from Xilinx though you can do it otherwise as per these couple of threads here and here, (with many more threads on the FFT topic elsewhere on the forum). I'm not certain what you are envisioning when you say "proper linux support". Digilent has some Petalinux projects for a number of our Zynq boards but they tend to be restricted to certain versions of Petalinux. Thanks, JColvin
  7. Hi @Soham Kulkarni, I have sent you a PM with some instructions on how to restore the EEPROM. Thanks, JColvin
  8. JColvin

    CMOD S7

    Hi @BParsons, Digilent has made the choice to keep that part of the circuitry on our boards proprietary. Thank you, JColvin
  9. Hi @wpless, The Petalinux project for the Eclypse Z7 is available on our GitHub here: https://github.com/Digilent/Eclypse-Z7-OS. Thanks, JColvin
  10. Hi @Iceman2020, I apologize for the delay, it look longer than expected. I have attached the two pdfs. Let me know if you have any questions. Thanks, JColvin Statement of Volatility Cmod A7-35T.pdf Statement of Volatility Cmod A7-15T.pdf
  11. JColvin

    Cora Z7 Pmod RS485

    Hi @sverhoff, It will be more complex that to simply connect Xilinx's AXI UARTLite IP to the Pmod RS485 because that IP does not natively support the RS485 protocol. There is a patch posted on a Xilinx forum here though: https://forums.xilinx.com/t5/Embedded-Development-Tools/Feature-Request-UARTlite-with-RS485-Driver-Enable-output-signal/m-p/689335#M39324. There is also another post that may be of interest to you here: https://microelk.azurewebsites.net/ZynqLnxRS485/ZynqLnxRS485. Thanks, JColvin
  12. Hi @fkropat, I have sent you a message as well with the Digilent contact information. Thanks, JColvin
  13. Hi @rpudelko, Additionally, it looks like you are using Vitis, so I would recommend following our updated guide for this here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/2020.1/getting-started-with-ipi. Let us know if you have any questions about this. Thanks, JColvin
  14. Hi @borhan, What board are you using so I can help you restore the material? As for preventing the problem in the future, the only recommendation I have would be to maintain extra caution when configuring different FTDI devices with FTProg or other similar programmers as they, as you and many others have found out, can very easily overwrite the configuration on a different board and not everything is easily reconfigured. It's an extra step in the process, but I would disconnect boards that you don't intend to program when using these types of programmers to prevent accidents. Thanks, JColvin
  15. Hi @manboy, I asked another engineer more familiar with the Pcam about this. Thanks, JColvin