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JColvin last won the day on January 15

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About JColvin

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  1. Hi @JohnA., The PS_SRST_B is available on the JTAG header on pin 14; there is a reference image showing where it is on the Xilinx JTAG header on the JTAG HS3 reference manual here: https://reference.digilentinc.com/jtag_hs3/refmanual#xilinx_zynq-7000_and_soc_support. I think for the jumpers you will need to change MIO2, as per the the Zedboard User Guide (pg 28) the current setting puts it in Independent JTAG mode which as per AR# 47599 from Xilinx the PS on a Zynq chip cannot be accessed through the ARM DAP which is affected by the CES chip versions. Could you try setting this value to be in Cascaded JTAG (settings the signal to ground)? Thanks, JColvin
  2. Hi @JohnA., I don't have ISE available to directly test this (since I'm on Windows 10), but on Vivado and SDK, I was able to to successfully load the .bit file and the application project launched. If I have a second USB cable attached to the PROG port (J17), then I am not able to readily choose to load the application. I don't know what tool you are using to load the file via the standard JTAG board, but do you happen to know if the tool you are using as the capability to drive the PS_SRST_B low? Xilinx tools occasionally require the processor core to be reset during debug operations (of which launching on hardware (system debugger)). As an additional question, what version of the Zedboard do you have and how are the mode jumpers configured on it (I realize you tried a number of options already, but in the interest of being on the same page. I do not think there is a way to load it through the UART USB as it is not connected to the necessary programming lines. Thanks, JColvin
  3. Hi @NicoloR, I personally haven't seen this error before and it looks you've tried all of things I would typically recommend (and you didn't directly say it, but I presume you only have the Analog Discovery 2 connected to your PC while trying to get it to work again). @attila, do you have a suggestion for what else they might try? Thanks, JColvin
  4. Hi @Robert Craven, For the Pynq-Z1, you can also use IO26-IO41 as digital output (or input) pins; there is an image showing where these pins are located on the Pynq Z1 in it's Reference Manual here: https://reference.digilentinc.com/reference/programmable-logic/pynq-z1/reference-manual#arduinochipkit_shield_connector. Let me know if you have any other questions about this. Thanks, JColvin
  5. I'm glad you found out what the problem was; thank you for sharing what you found!
  6. Hi @JohnA., I'm not certain why you need to decouple to two JTAG ports (since the UART port is separated from the programming port or if there is a different reason), but if you use something like the JTAG HS3, you can then use the Digilent Adept software to load the .svf file to the downstream Zynq SoC. Let me know if this is not what you are looking for. Thanks, JColvin
  7. Hi @Robert Craven, The Pynq Z1 with it's Arduino styled shield connector (more details in the Pynq Reference Manual here) can drive 20 MOSFETs (provided the MOSFETs have a Vgs at 3.3V) since as per the Xilinx Zynq 7020 DC and AC Switch Characteristics datasheet, each pin can provide up to a maximum of 10 mA, with a total of 200 mA per bank. The IO on the shield connector are split between a couple of different banks so ideally you will not run into the current limit for each bank, though you will likely want to double check. Let me know if you have any questions about this. Thanks, JColvin
  8. Hi @Michal Hucik, Could you provide a picture of your setup so I can see how the board is powered? Is the Nexys A7 able to be detected in the Vivado Hardware Manager (or alternatively, the Digilent Adept software)? The other thing I might recommend is trying a different USB cable or USB port since it seems based on the output that Xilinx SDK is able to detect the board (via the jtag_cable_name) but then is not able to properly detect the board afterwards. Thanks, JColvin
  9. Hi @zbd, The supported display resolutions are as follows: 640x480 at 60 Hz 800x600 at 60 Hz 1280x720 at 60 Hz 1280x1024 at 60 Hz 1600x900 at 60 Hz 1920x1080 at 60 Hz so to answer your question, the specific display resolution of 1920x720 is not supported. Let me know if you have any further questions. Thanks, JColvin
  10. Hi @Madhusudhan, I have sent you a PM with the instructions. Thanks, JColvin
  11. Hi @mjacome, Digilent doesn't provide Vivado so we don't have direct advice, though with the WebPACK edition of Vivado I do not think you need different accounts to install on different computers since the WebPACK version is license free (as of 2016.4). Aside from asking on Xilinx forums about this for more accurate information, I would recommend looking into the batch installation that is described in the Vivado Release Notes. Based on that material it looks like you can generate an authentication token associated with your Xilinx account to make the install go easier that expires after 7 days, though I do not know if it is possible to transfer this token between computers. At the very least though there is a command line method to installing Vivado. Thanks, JColvin
  12. Hi @SaltyMathematician, I suppose this is possible to do with enough work and time put into it; . I'm not familiar with all of the requirements for a motherboard diagnostics card; i.e. are you testing the full speed capabilities of each peripheral present on the motherboard (PCIe, memory slots, USB 3.0, SATA III, etc.) or just testing that signals propogate? There are probably some pre-made IPs from Xilinx that test these peripherals though Digilent does not have any examples regarding this. The Basys 3 (which uses a XC7A35T-1CPG236C FPGA) may not be fast enough (you can view it's capabilities in the Artix-7 DC and AC Switching Characteristics datasheet from Xilinx) to perform some of the diagnostic tests. I'm not certain what the end application you are looking for is in this situation, though I might recommend looking into a premade solution unless you are set on creating your own. Thanks, JColvin
  13. Hi @jtw, Based on this thread, I do not think there is an API set for the Spectrum Analyzer, though I do not know for certain if that situation has changed since early 2018. I have tagged the engineer much more familiar with WaveForms who will be able to more accurately address this. Thanks, JColvin
  14. Hi @chcollin, Actually, I think the value you found, (XISF_MIC_DEV_N25Q128), should be accurate that I looked through the file that you found (available on the Xilinx GitHub here for curious readers). Thanks, JColvin
  15. Hi @chcollin, I think you still might need the Micron flash family based on the Xilinx xilisf documentation and based on the paragraph starting on line 35 on the Xilinx GitHub here; mostly I'm pointing this out since I'm not sure how the flash will react to incorrect commands (it all depends if it cancels the command or does something unexpected). But there is also the chance that my Micron family thought is incorrect. I'll look for an equivalent version of the FLASH_DEVICE_ID that you found. Thanks, JColvin