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JColvin last won the day on May 26

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About JColvin

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  1. JColvin

    Type 6 Expanded?

    Hi @KKING, We are in the process of updating the standard; I'll let you know once it goes through. Thanks, JColvin
  2. Hi @laurent01, What version of Vivado/Xilinx SDK are you using? Thanks, JColvin
  3. Hi @[email protected], I will PM you the Digilent contact that will be able to discuss the licensing options that we have regarding the FTDI configuration. I'm not sure what you mean by burn Xilinx FPGA from PC, but if you have a bitstream already created and the board supports it, you could place the bitstream on a flash drive and load it from there. Or if it happens to be a Digilent board, you can load it via the Digilent Adept software. Otherwise, you may just need to use the Vivado Lab Edition. Thanks, JColvin
  4. Hello, I presume you mean the Cmod S6 rather than the Cmod A6. As mentioned in this thread, the Cmod S6 does not have a JTAG header. Thanks, JColvin
  5. Hi @Thejashree, I have asked some other engineers more familiar with our FMC Pcam adapter for their input on some of your questions, but I'll provide some input on the ones that I can. 1) Since 4 cameras are supported through the FMC Pcam adapter, each camera has two pairs of of MIPI lines that are controlled by pairs of pins on the FMC connector. 3) The FMC Pcam Adapter as an adapter does not dictate what lines are broken out the LPC FMC Adapter, that is instead dictated by Vita 57.1. However, the Zynq 7020 devices such as the Zedboard of which we have demos for the FMC Pcam adapter, do not have HP, GTX, or GTH lines, only the HR I/O lines. 4) Unfortunately, our FMC card does not support Zynq Ultrascale+ devices. 6) No camera is included with our FMC Pcam Adapter. The camera that we have tested it with is Digilent's Pcam module: https://reference.digilentinc.com/reference/add-ons/pcam-5c/start. 7) We have not tested it with Sony's cameras so I cannot confidently comment one way or the other on that. 9) The pinout of the FMC Pcam adapter is detailed in it's reference manual here: https://reference.digilentinc.com/reference/add-ons/fmc-pcam-adapter/reference-manual#pin-out. Thanks, JColvin
  6. Hi @brian222, Yes it is possible to do through the Record mode; there are some more details about this available in these forum threads: Thank you, JColvin
  7. Hi @Andy Rabagliati, I have moved your question to a more appropriate section of the forum where the engineer most familiar with the Analog Discovery 2 and the WaveForms software will be able to see and respond to your question. Thanks, JColvin
  8. Hi @dchandra439, The only board that Digilent has with the 2x7 JTAG header is the Zedboard: https://reference.digilentinc.com/reference/programmable-logic/zedboard/start. With regards to the voltage options on the Zedboard, the only way to get 1.8V logic of any kind would be through the LPC FMC header and setting the corresponding VADJ jumper to 1.8V. The FMC header provides 68 single-ended I/O (which can be configured as 34 differential pairs), though you would need an adapter to have them conform to the 2.54 mm pitch spacing. However, the Zedboard (and the other Digilent boards) do not have a header containing 10 I/O pins with a 2.54 mm pitch; all of our Pmod headers only have 8 I/O pins matching that pitch spacing. Let me know if you have any questions about this. Thanks, JColvin
  9. Hi @dchandra439, Digilent has a mix of those features on our boards, though not necessarily all at the same time. There are three questions that I have regarding your specifications: 1) Do your digital I/O pins at the different voltages all need to conform to the connector with the 2.54 mm pitch spacing? 2) For the JTAG cable connectivity, are you looking directly for a 2x7 JTAG header with the 2.00 mm pitch spacing, a small 6-pin header with the TMS, TDI, etc pins, or just the ability to load a bitstream from a host computer? 3) What logic standard is the digital IO at 1.8V and 3.3V conforming to? CMOS? TMDS? Something else? Thanks, JColvin
  10. Hi @2U3, I have moved your thread to a more appropriate section of the forum where the engineer most familiar with the Digital Discovery will be able to see and respond to your question. Regarding the 8ch x 640 x 480 data at 24 MHz that you want to output though; what sort of data is this? Is this 24-bit video data that you want to stream from your PC? Would this be happening at the same time as the recording of the 12ch of data at 24 MHz? Thanks, JColvin
  11. JColvin

    Type 6 Expanded?

    Hi @KKING, I believe we are on board with adding a Type 6A to the standard, though we do have a couple of questions/points that we would like your (or anybody reading this thread) feedback on as a customer. The main drawback against creating a Type 6A at the moment is that if pre-defined GPIO lines are added (I presume you are needing more than two of these GPIO lines since the standard as it currently stands allows for two alternate signals, such as an interrupt and a reset line, to be used in place of the No Connects on pins 1 and 2 on the Pmod header) the ability to daisy chain different I2C modules will become difficult. In principle, if all of the extra GPIO signals were only used on the bottom row of the Pmod header, you could still daisy chain I2C modules by treating the top header row as just Type 6, though that isn't necessarily following the spirit of being able to daisy-chain multiple modules together if you ignore half of the pins. Do you (or anybody else that happens to be reading this thread) have an opinion on this? Additionally, do you think the pass-through pins on header pins 1 and 2 would still be needed on the Type 6A, for the top row or to be included on the bottom row? Thank you, JColvin
  12. Hi @PapaMike, When you say you already have applications using the Arty A7-35, I presume this means you already have the Digilent board files (link to Digilent Github page on them) installed? I just ran a project with the Arty A7-35T on Vivado 2019.2 (I don't have Vivado 2019.2.1 installed), but did not get any critical errors. You can quickly check to see if you have the board files installed by running the TCL command of get_board_parts to see if Arty A7-35T shows up in the list. Let me know if you have any questions about this. Thanks, JColvin
  13. JColvin

    CMOD S6 How to JTAG ?

    Hi @Cris, You can use iMPACT (as well as Adept) to program both the FPGA and the flash. If iMPACT does not detect the board you may need Digilent Plugin for ISE tools, available for download here. Thanks, JColvin
  14. Hi @Amar, Does the last version of Vivado Design Edition no longer work on your machine? Or are you looking to be able to activate newer versions of Vivado? Otherwise, unfortunately Digilent does not sell vouchers for the Design Edition individually as per Xilinx's request. The only way that I am aware of to get access to newer versions of Vivado for the Genesys 2 would be to purchase a second Genesys 2 that includes a voucher. Otherwise, you would need to purchase access to the Design Edition from the Xilinx website. Thank you, JColvin
  15. JColvin

    design digital lock

    Hi @yasmeen, Those us here at Digilent aren't too familiar with Multisim as of yet, though as this is an assignment we would avoid giving a direct solution to this problem. You might take a look at these two projects that I found online here and here though. Neither of them have an alarm or a clock to pulse in the user provided values, but should give you a baseline of something to work with. Thanks, JColvin