JColvin

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JColvin last won the day on February 12

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About JColvin

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    Pullman, WA

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  1. Arty Z7-020 regulator failure?

    Hello @lrodgers, I have sent you a PM about this. Thanks, JColvin
  2. XVC problem in Vivado 2017.4 with Zybo Z7-20

    Hi @rhb, I think I found your Xilinx thread here. I don't know how VirtualBox sets up drivers with regards to whether or not the host OS or the virtual OS gets to take control of newly connected devices and where exactly drivers get installed (and Digilent does not provide support for ensuring cable drivers work in virtual environments), but if I understood your comments correctly, the place you can find the cable drivers (at least for me on my 64bit Windows) in regards to AR#59128 is in the C:/Xilinx/Vivado/2017.4/data/xicom/cable_drivers/nt64 folder. Thanks, JColvin
  3. ZEDBOARD ARM

    Hi @Sandokan, To add on to what @zygot correctly indicated (I personally haven't done this though) here are some pages that explain and give some information on just using one core here and here. Thanks, JColvin
  4. Hi @xc6lx45, They would end up being "wire-split" among the three sensors as well, though you would have to ensure that none of the sensors are being communicated to/with at the same time, otherwise you will end up getting the SPI equivalent of a bus collision (though I don't know if that is formally defined in the SPI protocol). Depending on the application though, if you are okay only getting data from each sensor about once a second (I haven't checked, but I think that is enough time for all of the acquisition and conversion phases), it hopefully won't be a huge detriment. Just my thoughts though.
  5. IO State on FDwfDigitalOutConfigure

    Hi @kdumont, I'm not certain for the exact cause of this, but my understanding (based on this older thread) is that you are not able to reduce the delay time between switching configurations, though your delay time is decreased from the stated minimum delay time by the creator of the WaveForms software of 1 ms to 5ms, so perhaps that has changed in more recent versions. I'm not certain if you are able to specifically define the output state during the transition. I have tagged @attila to see if there is something else that I am missing. Thank you, JColvin
  6. Editing the XDC file

    Hi @Newport_j, The Zybo-Z7 does not have a differential clock, otherwise you would have two lines that start with #set_property that define two clocks (one that ends in _p and one that ends in _n), but the Zybo-Z7 only has one clock that it is not differential, so you will only add two ports, as shown in the first image in step 7.5. This will let you have the verilog code match the same names as you used in the xdc file so that Vivado can properly generate the code. Let me know if you have any other questions. Thanks, JColvin
  7. Welcome!

    Welcome to the Forums @jfdo!
  8. Raspberry pi3 & Basys2 communication via SPI?

    Hi @ChadW, I'm not certain where the Pmod ACL2 fits into this, but yes you can plug in digital pins from the Raspberry Pi 3 directly to the Basys 2 since they both operate at 3.3V logic. Thanks, JColvin
  9. Hi @Renier And to answer the question about stacking Pmod HAT adapters on top of each other, while the boards are all pin compatible so you would not cause an immediate short circuit or anything like that, because the pins are all routed to the same location, there would be no way for the boards or the Raspberry Pi to differentiate between JA on one HAT adapter vs a different HAT adapter, so it would not work in that fashion. Otherwise @xc6lx45's suggestions of bitbanging the SPI protocol will be one solution. Alternatively, you can take advantage of the fact the SPI protocol selects which slave device it is talking to based on the chip select pin. With this, you could set it up so that the third Pmod is connected to the same physical clock and data lines (MOSI, MISO, SCLK) as the Pmod on JA or JB via a wire splitter (not a technical term) of some kind. You could then manually pull the chip select line low in your code and then use the built in SPI wiring to send all of the data. The catch here will be if the SPI code for the Raspberry Pi does not let you specify/customize which chip select pin you are using so you end up talking to another SPI Pmod at the same time, which can cause issues. You will also need to make sure (if the previous thing is not an issue) is that you then do not have the Raspberry Pi communicate with the two Pmods connected to the same SPI port at the same time. It won't look as pretty visually as just plugging the Pmod into JC, but something to consider. Thanks, JColvin
  10. Editing the XDC file

    Hi @Newport_j, Whatever naming convention for the XDC file that you downloaded and saved to your computer is correct. The biggest thing that you will need to make sure of is that the file name (whatever it might be) has an ending of .xdc The master XDC file does not have to be changed in any way, it can remain as is, serving it's purpose as the master copy. The file that you load into Vivado in Step 6 of the Getting Started Guide will be changed though. You will want to uncomment (by removing the # symbol) lines 8, 9, and 27, as shown in the image associated with Step 6.5. If you would like some more detailed documentation on getting a project up and running on a board (albiet not for the Zybo-Z7) you can take a look at this tutorial here. It talks about editing the XDC file in step 17. Let me know if you have any questions. Thanks, JColvin
  11. Analog shield DAC for galvo

    Hello @mitchpitch, My comment was incorrect; I'll change it. The part always has an adc read of 16 bits from -5 to +5 volts. The only difference is if you choose the 16 bits to be represented as 0 to 65535 or from -32768 to 32767. The DACs also output from -5V to +5V. Let me know if you have any questions about this. Thanks, JColvin
  12. Editing the XDC file

    Hi @Newport_j, You can open up the XDC in Notepad (if you are using Windows) or in a different text editor like notepad++. But yes, that image does not look correct. What I would to do (and personally do for myself) get the XDC file edited and saved is: - Go to the Zybo-Z7 XDC on Digilent's github (here) and copy and paste all of the text into some sort of text editor. - Save the master XDC file (making sure you save it with a .xdc extension, even if your program doesn't recognize it and you have to type it in manually) to your computer where you can find it later - when you start a new project in Vivado and during the "create a new project process" you will be asked if you want to add constraints. Choose that file you saved to your machine and make sure you also tick the box in the bottom left hand corner that says "Copy constraints files into project" or something similar. - Then you can open it up in the Vivado IDE/GUI and edit it safely since you are not messing with the "master copy" you saved to your computer. Some images of this are available on the Digilent blog here: https://blog.digilentinc.com/creating-and-programming-our-first-fpga-project-part-2-initial-project-creation/. Let us know if you have any questions about this. Thanks, JColvin
  13. Analog Discovery: Data Logger issue

    Hi @jfdo, The URL doesn't change when we move a thread so it can always be readily found with the existing link, but the section of the Forum did change to Scopes and Instruments where the creator of the WaveForms software commonly looks. Thanks, JColvin
  14. Hi @spri, I believe this thread addresses your question. Thanks, JColvin
  15. Problems with detecting NetFPGA-SUME boards

    Hi @ricardo, I would recommend posting on the NetFPGA Forums here. The NetFPGA community will be able to provide much more direct and helpful advice than those of us here on the Digilent Forum can provide for the NetFPGA SUME. Thank you, JColvin