JColvin

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JColvin last won the day on November 23

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About JColvin

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  • Birthday April 22

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    Pullman, WA

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  1. Pattern Generator Output Impedance

    Hi @CharlieO21, Could you attach a picture of your physical set up on how you measuring the impedance? When I measured the output impedance of a pin on the pattern generator set to constant with an output Z, I measured. Here is a picture of my setup. Thanks, JColvin
  2. OpenDrain_impedance_setup.jpg

    From the album Forum photos

    Setup of pin 7 (brown) on the pattern generator at a constant Z value to measure the resulting impedance with a black ground pin for reference.
  3. Forum photos

    Photos that I decided to upload to support a reply
  4. PMOD ACL

    Hi @peepo Digilent has not done any designs for our Pmods on the Lattice Semiconductor iCEstick. Thank you, JColvin
  5. Vivado CLOCK_DEDICATED_ROUTE

    Hi @Mell, I have moved your question to a more appropriate section of the Forum. I'm slightly confused by the way you phrased your question. Is the signal you are providing to one of the pins on the Pmod connector of the Basys 3 a clock signal? Which pin are you using and could you provide your .xdc file so that we can look at it for ourselves? Thanks, JColvin
  6. Hello!

    Sweet. Welcome to our Forum!
  7. PmodAD5 evaluation

    Hello @Yacov Cohen I apologize for the delay. Since you are using an Arduino board which uses a 5V digital IO and are supplying 5V to the chip (both as a digital source and analog source), you won't need to worry about removing JP1; for your reference, it's next to pin 1 on the Pmod header on the physical board. In terms of changing the reference voltage used, you'll want to change bit 20 in the Configuration register, which will be very similar to the already existing function in the library that changes the gain in the Configuration register. Let me know if you have any questions. Thanks, JColvin
  8. $6USD Xmas Coupon For Ford VCM 2 VCM II IDS

    Hi @Alan Andersson, I'm not certain how this entirely applies to Digilent Forum members since the typical question on this Forum doesn't tend to be running diagnostics on cars... Thanks, JColvin
  9. please help me

    Hello @youkbumjin, I have moved your question to a more appropriate section of the Forum. You can view a couple a projects that use the microphone on the Nexys 4 DDR on it's Resource Center, with the two projects here and here. Let me know if you have any more questions. Thanks, JColvin
  10. SNTP

    Hi @pappastech, I heard back from our engineer and learned the following: <start> He is going too low in the network stack. He should call… unsigned long secondsSinceEpoch(void); Or unsigned long secondsSinceEpoch(IPSTATUS * pStatus); #define ipsTimeSincePowerUp MakeDEIPcKStatus(20) #define ipsTimeSinceEpoch MakeDEIPcKStatus(21) The first call to secondsSinceEpoch will do the SNTP calls in the background; which will take some time, milliseconds. The status returned before the time is set is ipsTimeSincePowerUp, once the time is obtained the status will be ipsTimeSinceEpoch. Some sample code. You have to wait for the time to become valid, so check the status. epochTime = deIPcK.secondsSinceEpoch(&status); if(status == ipsTimeSinceEpoch) { GetDayAndTime(epochTime, szTemp); Serial.println(szTemp); } <end> Let me know if you have any questions. Thank you, JColvin
  11. SNTP

    Hello, I have asked the appropriate engineer here at Digilent for some feedback to your question. I'll comment back when I get an update. Thanks, JColvin
  12. Arty-Z7-20 board

    Hello @deppenkaiser, Unfortunately, we don't have any updated tutorials beyond 2016.4 for the Arty Z7-20 at this point in time; we will update them, but likely not until a bit after 2017.4 is released. I think some of your questions were addressed in your other threads, but you can find a tutorial on getting bare metal going for a Zynq chip here: https://reference.digilentinc.com/vivado/getting-started-with-ipi/start. As for the very easiest Linux architecture, I imagine that would be the one where you have to do the least amount of work, but it looks like we have a Petalinux project for the Arty Z7-20 on our GitHub available here: https://github.com/Digilent/Petalinux-Arty-Z7-20. It uses Petalinux 2017.2 though so it won't exactly match what you are working with, but it's a good place to start. Let us know if you have any questions. Thanks, JColvin
  13. PmodAD5 evaluation

    Hi @Yacov Cohen, I happened to find an Arduino UNO around the office, so now our setups should be the same. However, I still received the same results as I stated before; I even changed which channel I am measuring and still received the expected results. The file I am using is here, with the .cpp library file here and the .h library file here. However, I did find something that might apply to your setup that could get the results you are seeing. How are you supplying the 1V differential across the pins? Are you supplying 1 V to A3 and 0V (ground) to A4? The thing that you don't want to do is supply any sort of negative voltage, even if it mathematically works out to be 1V (such as supplying 0V to A3 and -1V to A4), since the AD7193 is not equipped to handle negative voltages. Thank you, JColvin
  14. Cable 240-109

    Hello @Marek Vajsabel, The wires are 28 AWG, with one core per contact, and a total of 12 contacts. Did that answer your question? Thank you, JColvin
  15. Straight-Through/Crossover Cable Connection

    Hello @gcp, I took a look at your design, but unfortunately I'm not sure how much more help those of us here at Digilent can be for your design; none us here at Digilent have worked with the ublox EVK-U27 or a GNSS receiver, so we won't be able to offer any useful advice. From a high level, it looks like the Tx and Rx lines between the Zedboard and the GNSS receiver are correct in terms of data direction, but I am not certain about the data direction for the UART lines between the Zedboard and EVK board since they have conflicting labels. You would also need to ensure that the voltage levels between the three boards match one another in terms of the electrical standard to make sure none of the pins are damaged on any of the boards. The main idea behind a crossover cable and a pass through cable is based on how the pins on the two host boards are hard wired to make sure that the data goes to the correct pins; since you are using individual wires to make your own connections and can assign which pins perform which function in your design in an FPGA, either cabling will work as long as the data lines are appropriately accounted for. Beyond that, there isn't much more we can offer in terms of the proper physical setup that is within the scope of the Forum. Good luck, JColvin