• Content Count

  • Joined

  • Last visited

About JColvin

  • Rank
    Forum Moderator
  • Birthday April 22

Profile Information

  • Gender
  • Location
    Pullman, WA

Recent Profile Visitors

13714 profile views
  1. Hi @Thomas4086, I'm not certain why Adept would not be able to find the dpcomm.dll. As a first step, I would probably try uninstalling and then re-installing the Adept software. As an additional question, do you happen to have the Digilent Agent running on your computer; I have seen it using the dpcomm.dll which can cause update issues. Thanks, JColvin
  2. Hi @pcdeni, The NetFPGA group has created all of the materials and provides support for those materials for the NetFPGA SUME. Digilent does not have any reference designs or support for the SUME board. The mailing list for the NetFPGA SUME, which you should have access to if you signed up for access to the official repository, would be able to provide additional help regarding this. Thank you, JColvin
  3. JColvin

    Pmod ALS Help

    Hi @MarkSe, The captured logic looks good to me with regards to SPI Mode 3. Let me know if you have any other questions. Thanks, JColvin
  4. Hi @chrisD, This is not possible to do with the OpenScope MZ, though simultaneous logging and viewing of the data on the OpenLogger is possible. My understanding is that the OpenLogger does simultaneously log chunks of data to the SD card while viewing the data in WaveFormsLive. However, I do not think you can configure the size of these chunks or when the OpenLogger logs Each chunk of data that is logged during that time will be labeled with the first sample number associated with that chunk (and each entry will show the time stamp in relation to the very first sample at the start
  5. JColvin


    Hi @Leo_W, I asked another engineer much more familiar with Adept and the JTAG modules about this (they created and developed both), but they did not have any further suggestions or know what the problem might be. The only thing that they noted was the diodes on the JTAG lines which increases capacitance and could cause signal integrity issues, but it's unlikely this is the problem since you are able to consistently access and program the board through Adept through the SMT2-NC. From what I understand, Adept doesn't do anything different than Vivado in terms of detecting a downstream
  6. Hello @synapsium, I dug around and was able to find that particular project. I put it up on the Nexys 4 Resource Center here: https://reference.digilentinc.com/reference/programmable-logic/nexys-4/start#example_projects. I haven't used this project before though so I'll be of limited help with regards to it's implementation. Thanks, JColvin
  7. Hi @UC_J, I apologize for the delay. I asked some other engineers about this but we don't have any additional suggestions beyond what you have already tried. I will send you a PM to discuss replacement options. Thanks, JColvin
  8. Hi @Wayne Contello, I don't know the implementation within WaveForms itself, but I suspect your conclusion of the trigger only using a 7-bit address is correct as true 8-bit addresses (as far as I understand it) don't formally exist within the I2C specification. I think @attila is out of the office right now, but they will be able to see your feedback and clarify the implementation. Thanks, JColvin
  9. Hi @Sangkyu Choi, This thread should contain the details that you are looking for: You should also look at the Device_Synchronization.py example that is within WaveForms SDK. Thanks, JColvin
  10. JColvin

    Zybo Xparameters Wifi

    Great! I'm glad you were able to get it working.
  11. JColvin

    Zybo Xparameters Wifi

    Hi @Soufyane, Can you attach an export of your block design? You should be able to right click and save it as a pdf. Thanks, JColvin
  12. Hi @XO-NANO, That is either glitches or higher frequency noise in the signal. You can learn more about it and what you can do in this Forum thread: Thanks, JColvin
  13. JColvin

    Zybo Xparameters Wifi

    Hi @Soufyane, You can rename any IP in a block design. Just click on the IP so the whole block turns orange, then go to the General tab in Block Properties (you can also press CTRL+E or right click on the IP block to get to the Block Properties). There will be Name field in the General tab where you can type any name you want, which can be helpful for when you have multiple of the same IP block, such as AXI_GPIO, that you want to more readily identify. What do you mean by it crashes in addPin? Vivado crashes? Where are you seeing the addPin function? Thanks, JColvin
  14. @attila would be the person best suited to be able to help you with regards to creating a way to interpret NRZI code, though as a preliminary question (after looking up what NRZI was since I hadn't heard of it before) are you using fixed-rate RLL or bit-stuffing with the data? Thanks, JColvin
  15. Hi @pisa_student, I have moved your question to a more appropriate section of the Forum. Thanks, JColvin