Azurath

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  1. Debugging the DDR3 pins?

    Yes I was actually struggling alot but I am not afraid of something just because it is complicated. Life is complicated itself, further we have Girls that are more complicated than the DDR3 algorithm itself :). Anyhow I want to see whether the picture I stored is saved in the SDRAM DDR3 and want to debug it somehow. My second thought is to use the UART and the processing IDE to print the picture but I don’t know any other way to confirm that the DDR3 has stored all the pixel values correctly. Is there professional ways to debug a DDR3? Regards, John
  2. Hello! I cannot debug the DDR3 outputs/inputs. I get the following error message. Bus interface connection '/mig_7series_0_DDR3' is connected to interface '/mig_7series_0/DDR3' with VLNV xilinx.com:interface:ddrx:1.0, which is not debug-able by System ILA IP. HDL attribute 'DEBUG' will not be set to this bus interface connection. Could anybody help me with this? I am going to check if my 640x480 picture is saved in the ddr3 but I have to use the ILA which does not work atm. regards, John
  3. Nexys-Video-HDMI not working on vivado 2017.3

    Nope , I also had to upgrade the IPs so the block generation works now thx.
  4. Hello! I get the following error when I am going to run the createproject.tcl. Do I have to download an earlier version than 2017.3, if so is there a way to not do it since it takes me a lot of time to (uninstall and install) different versions. The error is: [Board 49-71] The board_part definition was not found for digilentinc.com:nexys_video:part0:1.1. The project's board_part property was not set, but the project's part property was set to xc7a200tsbg484-1. Valid board_part values can be retrieved with the 'get_board_parts' Tcl command. Check if board.repoPaths parameter is set and the board_part is installed from the tcl app store. The reason why I want to run this project is simply because to see if the MIG7 IP is used without a uB which is what I am seeking for. regards, John
  5. Advices for camera and SDRAM integration on nexys video

    Okay! Currently, I have working example and can write data and read data using the MIG7 interfaced together with a uB. However, since this is a soft core and runs with a certain speed , we wont get maximum speed here. I might be wrong and just want clarifications. regards, John
  6. Hello! I have been investigating how multiple clock domains work and how you can send data ASAP from a camera module to a SDRAM (taking a pic). I am currently using a Nexys-Video and a Zed board and wonder if I could get some tips. The problems I encountered during my research is: -The picture I take has to be stored ASAP, meaning I have to use the mig7 interface for the SDRAM and HDL code. However this will be hard since it requires me to understand how the MIG7 works and thus writing a HDL that is adjusted to work with it. - What is the maximum frequency of a micro blaze? Using the micro blaze would be easier for me since I can directly write and read to/from the SDRAM using the peripheral libraries. However, the maximum clock frequency of a MB processor is not so much thus making that choice a bottleneck. - How should the communication between the camera and the SDRAM work? My initial idea was to use a buffer (BRAM) and store my picture there and then somehow do pipelined reading using the micro-blaze. Or alternatively, to send bytes to the micro-blaze directly without using a buffer. However I don’t really know if that is a good idea since the camera and the micro blaze work on different clock frequency levels. Would be glad if you could help me on the way. Regards, John