Krelle52

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  1. I am doing a project with some audio DSP. For this I am using the audio codec on the Zybo. The first thing I want to do, is to be able to record and playback audio with a little delay between input and output. In order to speed up the development process, I decided to use the DMA Audio demo. But I'm lacking some information or rather some documentation. So is there any of your guys who knows which registers is references to here (Audio controller registers) in the code below. Since I2S is an hardware interface standard, so there should not be any registers. So I think it has something to do with DMA. But I can't find any documentation, which fits. Do anybody know which documentation would give a insight to the registers? #define AUDIO_CTL_ADDR XPAR_D_AXI_I2S_AUDIO_0_AXI_L_BASEADDR //Audio controller registers enum i2sRegisters { I2S_RESET_REG = AUDIO_CTL_ADDR, I2S_TRANSFER_CONTROL_REG = AUDIO_CTL_ADDR + 0x04, I2S_FIFO_CONTROL_REG = AUDIO_CTL_ADDR + 0x08, I2S_DATA_IN_REG = AUDIO_CTL_ADDR + 0x0c, I2S_DATA_OUT_REG = AUDIO_CTL_ADDR + 0x10, I2S_STATUS_REG = AUDIO_CTL_ADDR + 0x14, I2S_CLOCK_CONTROL_REG = AUDIO_CTL_ADDR + 0x18, I2S_PERIOD_COUNT_REG = AUDIO_CTL_ADDR + 0x1C, I2S_STREAM_CONTROL_REG = AUDIO_CTL_ADDR + 0x20 };