• Content Count

  • Joined

  • Last visited

  1. jge64

    Zybo Z7-20 PCam-5C Demo timing closure

    Thanks @Tim S.
  2. jge64

    Zybo Z7-20 PCam-5C Demo timing closure

    A new user too -- trying to get familair with the docs and files. I got similar timing closure problem as Tim did. After following the instructions to download the demo project, https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-pcam-5c-demo/start and following instructions below (used 'Vivado' option) to build w/o changing anything: https://reference.digilentinc.com/learn/programmable-logic/tutorials/github-demos/start After build/generate-bitstream, got total negative slack as -6.646ns and hold slack -2.03ns @jpeyron: -- are you still suggesting to just ignore it? :
  3. jge64

    IP used in Zybo-Z7 MIPI Pcam 5C demo

    Thank you, jpeyron, I'll give it a try.
  4. jge64

    IP used in Zybo-Z7 MIPI Pcam 5C demo

    But from the IP cata Thanks, But from the IP catalog, if the IPs are from Xilinx, they are labled as 'Purchase':
  5. jge64

    IP used in Zybo-Z7 MIPI Pcam 5C demo

    I assume the MIPI IP is already used in the demo. What is the IP? Is it from Xilinx (MIPI CSI Controller Subsystems)? as https://www.xilinx.com/products/intellectual-property/ef-di-mipi-csi-rx.html --but it is stated that the IP is targeted to Kintex-7 and Zynq UltraScale, Not to the Zynq-7010/20 as used on the Zybo-Z7? --anyone familar with the license terms and the pricing? (site-based or for each device installed?) Or is it from the NorthWest Logic? -- which stated as targeted for Zynq-7000 (as used on hte Zybo-z7). --anyone familiar with the license terms and pricing? Thanks,
  6. jge64

    PYNQ-Z1 awareness in vivado

    I'm trying to use PYNQ-Z1 board (instead of Xilinx's ZC702 eval board) for a lab in Xilinx' UG871: Ch10, Lab 1: Implement Vivado HLS IP on a Zynq Device (here pynq-z1 instead of zc702) I can see the board listed under the list of board when start a new vivado project and select board (instead of part, like in UG871 v2016.4 https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_4/ug871-vivado-high-level-synthesis-tutorial.pdf page 222, specify vivado project details), after following the pynq-z1 documentaion (copy the board files to specified folder of vivado path); it works like other xilinx board (like ZC702 eval board). But, the board is not listed in the drop down list as presets when I do config Zynq AP SOC ( as in the same UG, page 229, like zc702 listed). I did see the preset file in the same board def files (zipped), and even tried to load it (import xps settings). Without doing it successfully, I can not even run a hello word demo which needs to use UART (aparently, the usb/UART is on the pynq-z1 board). Any procedure to follow so I Can have the board listed in the drop-down list in the projectsettings and in the presets? Thanks,