BogdanVanca

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BogdanVanca last won the day on November 29 2018

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  1. Hi @learni07, If you want to save a specific setup, you can use putty or termite. Best Regards, Bogdan Vanca
  2. Hi @learni07, Can you please check the baud rate from Tera-Term? For this, click on Setup->Serial port and check Baud Rate down-menu. It has to be 115200. Best Regards, Bogdan Vanca
  3. Hi @Joel Richard, The fastest way of verifying your Verilog code is by using Test-Benches. Furthermore, if you want to do a live capture of your design you can go with ILA. If you want to speed-up your synthesis, you can increase the number of jobs used by Vivado. The Number of jobs is proportional to the number of local processors to use when launching multiple runs simultaneously. Best Regards, Bogdan Vanca
  4. Hello @Artoria, Please try to install Xilinx USB/Digilent cable drivers. Follow these instructions: https://www.xilinx.com/support/answers/59128.html Best Regards, Bogdan Vanca
  5. Hi @flying, I’ve opened your Vivado project and I faced the same issues. Your problems are probably related to the fact that you generated your IP’s output products before you changed the target device. In order to successfully generate the bitstream file, you need to select the Zc010 device and after that, you must update your IPs, generate their output products and finally generate the bitstream. The next step is to export your design into the handoff folder and regenerate the bsp file in SDK. Also, before you generate the bit file you must deactivate the DEBUG module from MIPI_CSI_2_RX_0 ip. If you dont do that, the project will not fit in the z10 variant. Underneath you can see all the steps that I went through. 1. First, I cloned the ZYBO Z7 DEMO project from here: https://github.com/Digilent/Zybo-Z7-20-pcam-5c?_ga=2.150711477.200137549.1554706874-1290099257.1518602399 2. After that, I updated the Vivado library repository folder using the following repository: https://github.com/Digilent/vivado-library 3. After this, I moved back with 3 commits in the master branch. In this way I could generate the project using our old tcl Vivado flow. The same tcl file that you used. 4. I deactivated the Debug Module within MIPI_CSI_2 IP and I run create bitstream. 5. I exported the bitstream file in the handoff folder and I regenerated the bsp file in SDK. You can find the complet functional project on this link: https://www.dropbox.com/s/e2t6etbeuethh30/Zybo-Z7-20-pcam-5c.rar?dl=0 For video processing you can use Vivado HLS. You cannot install OpenCV in PS. An alternative is to write down your own video processing algorithm in HLS and from there you can export it as an ip in Vivado. From what I know HLS includes the OpenCV interfaces. Best Regards, Bogdan Vanca
  6. Hello @flying, Can you please give me the entire project? In this way it will be easier for me to trouble-shoot your problem. The issue may come from different directions. Best Regards, Bogdan Vanca
  7. Hi @flying, You can ignore the DDR critical warnings and probably you can also ignore the ILA warning. The DDR warnings are due to our preset file. The ILA warning should not affect the functionality of your design. Presuming those 3 errors that I'm seeing in your image are not related to your last run, you can try to export your hardware and regenerate your bsp files in SDK. Best Regards, Bogdan Vanca
  8. Hi @Blake Sorry for my late reply. Please check the fallowing link: https://www.dropbox.com/s/87cm0faa66sdra9/fmc_hdmi_in_1.zip?dl=0 This is the first variant of the project. I will try to make new updates into the close future. The project reads on HDMI1 IN input the resolution given by HDMI OUT, so you have to make a loop-back between those two. For patterns I used the test pattern generator from Xilinx, which needs a license, although the license is free. So, you either request one from Xilinx, or you can try to copy the one that I have. Check the attached document. You have to copy the file on this location : C:\Users\<your username>\AppData\Roaming\XilinxLicense. I will keep you in touch every time I add something new. If you have any questions please fell free to ask. Best Regards, Bogdan Vanca tpg.zip
  9. Hi @Blake, Short update. I've recreated Adam project with a different setup and it works. I'm able to read different resolutions trough the first input of the FMC-HDMI adapter. I'm using a zybo to generate those resolutions, which further on are read by the VTC ip core. Check the images bellow: The first image is the serial terminal from which I communicate with Zybo, and the second image shows the output values within the VTC ip core. I couldn't be able the replicate this using a laptop as an hdmi source, and that is because I think there are problems with the edid file used by Adam in his project. For now, you can use his project as reference, and for future I will try to get rid off Zybo and add everything into Zed. Also if you check this link: https://forums.xilinx.com/t5/Xcell-Daily-Blog-Archived/Adam-Taylor-s-MicroZed-Chronicles-Part-216-Capturing-the-HDMI/ba-p/794874 you will found out that : "Initially in its free-running mode, the ADV7611 outputs video in 480x640 pixel format. Checking the VTC registers, it is also possible to observe that the detector has locked with the incoming sync signals and has detected the mode correctly, as shown in the image below: " So the message that you initially received is actually correct. I will keep you in touch with everything that I'm adding to this project. Best Regards, Bogdan Vanca
  10. Hi @Blake, I'm working on it. Unfortunately the project made by Adam is not working at all, so I have to re-do everything from scratch. Right know I have to figure out on how to properly configure the ADV7511 chip. I don't have problems on the I2C lines but I think that I'm not using the right values for the internal registers. I'm trying different configurations, and after I will reach to something functional, I will do a simple streaming of data between the adapter input and hdmi zed output. Best Regards, Bogdan Vanca
  11. Hello @Blake, Check out the attached file. It does a functional test for your adapter. You have to connect a VGA monitor to Zed VGA output, and create a loop-back between Zed HDMI output and HDMI IN2 of the adapter. Please give me an update after you finish. Thank you. image.rar
  12. Hello @Blake, 1. Yes, you are right. I did not know that your message remain the same, regardless if there was a connection or not. 2. Please send me your entire project, as it is. I will go trough it and I will do all the debugging. "If I just want to transfer the hdmi input signal from fmc to hdmi output of Zedboard, is there any sample project for reference?" We are working on it. I will update you with the project as soon as we finish it. Again, sorry for the long process into solving your issue. Best Regards, Bogdan Vanca
  13. Hello @Blake, I have done some digging into Adam project and I reached to some conclusions. I will start from your serial terminal message: "control 9 status F00 Error 7F00000 Int Status 0 H and V Size 1E00280 Detector Timing Status 7 Video Mode = 5" On a first glimpse, if you look into the .xdc file of the project, you will found out that this project doesn't output anything on Zed HDMI Output. It only uses a couple of the FMC-HDMI inputs, so is normal for you to don't see anything on your monitor. The message that you see on the serial terminal, outputs the content of some state registers within Video Timing Controller ip (please check this document:https://www.xilinx.com/support/documentation/ip_documentation/v_tc/v6_1/pg016_v_tc.pdf). Those registers are useful for testing your software application and the adapter. Your message tells me that your project actually works, and let me tell you why: The fallowing number : "1E00280" is the horizontal and vertical frame size, without blanking of your HDMI source, where 1E0 is equal with 480, and 0280 is equal with 640, both in decimal. Also the value "5" of the Video Mode, is the returned by this function "u16 XVtc_GetDetectorVideoMode(XVtc *InstancePtr)". This function gets the video mode currently reported by the detector in the VTC core. The number 5 points to Video mode VGA. You can check that into the xvtc.h header file. You can check the rest of the registers by accessing the link. Regarding to your debug message, you don't have to add it, because this function XIicPs_MasterSendPolled(&Iic, SendBuffer,2, IIC_SLAVE_ADDR) from Adam code, check line 132, checks for completion of transfer. So, I think that your problem may come from the way you wrote your verification algorithm. You can check for example if you used the correct base address for the iic driver instance. For that you can look into the function above, and check if your base-address match to the one that this function uses. Unfortunately I don't know why the lk project doesn't work. I don't have the board, so I cannot test it. I will try to clean Adam hardware project from errors, and after that you may adapt it for ZCU102. For now, I think that this would be a good starting point. Best Regards, Bogdan Vanca
  14. Hello @Blake, I've created for you an image that test your FMC-HDMI adapter. It does a basic data transfer between the HDMI output of the ZedBoard and both of the adapter hdmi inputs. Prior to this it also uses all the I2C lines. Please check the .rar attached file. In order to recreate the test, please fallow the fallowing steps: 1.Make sure that you have everything in place, check the bellow instructions and the first image. Connect USB cable from PC to ZED USB PROG port (J17) Connect USB cable from PC to ZED UART port (J14) Connect FMC-HDMI board to FMC connector J1 (of ZED) Connect Power cable to J20 (of ZED) Set mode jumpers for JTAG programming (all to GND) Set J18 (of ZED) jumpers to 3V3 or 2V5. I'v tested both variants. Create a loop between HDMI-OUT J9(ZED) and FMC-HDMI IN1 of the adapter. Turn ZED board on 2. Open Vivado (I used Vivado 2017.4). Open Vivado, and click on Open Hardware Manager within the Welcome Page. After this click on Auto-Connect. You should see the Zed into the upper left panel.Check the image bellow. 3. Add Configuration Memory Device Right click on xc7z020_1 and choose "Add Configuration Memory Device". Check image bellow. 4. Choose the right memory device for ZED. Please choose "s25fl256s-3.3v-qspi-x1-dual_stacked" from the list. Click to program the device. Check images bellow. 5.Program the device with the files attached to this message. For "Configuration file" you choose BOOT.bin. For "Zynq Fsbl" you choose fsbl.elf. Click OK. 6. Wait until it gets programmed. After finish, you click OK. 7. Prepare the board for testing. Open a serial terminal, termite, putty, teraterm etc. Find the COM port and choose 115200 for baud rate. Set jumpers for QSPI programming (MIO5 on 3V3 and SIG, the others on 3V3 and GND). Power OFF the Board. Power ON the Board. The image should boot. See the image bellow. 8.Do the actually test. Make sure that the HDMI-OUT (ZED) is connected to HDMI-IN1 of the FMC-HDMI adapter. Press ENTER. Wait for the test to finalize. Make sure that the HDMI-OUT (ZED) is connected to HDMI-IN2 of the FMC-HDMI adapter. Make sure that your adapter is not loose. Press ENTER. Wait for the test to finalize. 9.Check the results, and give me an update . image.rar
  15. Hello @Blake, I've used the project provided by @jpeyron, an I was able to test the I2C interface communication. I will see if I can make you an different project for testing your device. Thank you. Best Regards, Bogdan Vanca