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  1. Is there a CAD model available for the Pmod shield? I'm using it with the Arty board (for which I do have the CAD model), and would like to incorporate both into an assembly so I can create a case. thanks!
  2. Hi @jpeyron, I'm using Vivado on Linux and the interface is slightly different. There is no "additional options" link to enable compression, sadly. I've added the compression option in my .xdc file and that's working. I'm not using the Microblaze core, either. Just straight up verilog. I'm powering Arty via J10. I have JP1 jumped. It's inconsistently loading the program on power-up. Thanks
  3. adding this to the top of my .xdc file made it load from flash a lot faster: set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
  4. yes. so here's the thing. it works about every other time. maybe 1 in 3.
  5. I have successfully used Vivado to store the bitstream into flash. On power-up, however, it does not program itself. If I push the PROG button, it does load the program from flash. That takes about 6 seconds. Two questions: 1. how do I get the program to auto-load? 2. how can I get it to load faster? the default program from Digilent loads in under a second. Thanks!
  6. ok, confusing for a beginner. I was already able to program the hardware directly by skipping all of that. Step #4 has a path for SDK / Vivado, and I had been following the Vivado path for each step.
  7. There are only design sources, no IP sources. And, yes, step #4 wants "include bitstream" checked. That yields the "Cannot Export Hardware" error dialog.
  8. I'm attempting the GPIO demo with a new Arty Dev board and running into the following error. I'm following instructions here: Which is good until step #4. And if I uncheck "include bitstream", I get this error on the console: "Cannot write hardware definition file as there are no IPI block design hardware handoff files present" Since I'm new to Vivado development, this puts me at a dead stop. Thanks!