JessPlazas

Members
  • Content Count

    6
  • Joined

  • Last visited

Everything posted by JessPlazas

  1. Thank you very much for the project. And I see how you can change the sampling frequency and sampling rate. However, I do not see in what record that can be done. Since this is done from an ipCORE, which for now does not interest me. I would like to know where it can be done within the code, in which register ?. I would appreciate your response.
  2. Hi. I would like to know, if it is possible to modify the sampling frequency, the number of samples of the ADC of the card Nexys 4 DDR ?. I know there are modes of use, but these depend on the registers but do not allow manipulation of these parameters. If you can, I would be grateful if you could tell me how it is possible.
  3. Hi. If I saw the program in Verilog, but I did not understand it. I would like programming in VHDL, or an orientation of how the ADC works, I have tried to read the datasheet but it costs me a little to understand it. https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf
  4. Hi, I'm new to this. I want to know how to describe in VHDL the operation of the ADC of the Nexys 4 to view it in LEDs. Any suggestion?