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About tonybarry

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    Sydney, AUS
  • Interests
    astronomy, occultation observing

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  1. Well well well, it seems Digilent actually HAS a R2R resistor ladder which will eat at 25MHz - this is $4.99 and requires no programming :-) Called a PMod R2R ... yes there will be digital glitches mixed in with the actual digital stuff, but that can be filtered with 2-pole Butterworth RC. Tony Barry Sydney, Australia
  2. @jpeyron, Many thanks for your informed answer. Much appreciated. I will need some GPIO to get associated stuff working (the GPS has serial in and out, and a1PPS signal that needs to be on a fairly low-latency input (I presume the concept of interrupts are available on FPGA). So the board with the most GPIO looks the nicest :-) The PModSD card is very nice. I haven't hit the specs hard yet. And I am hoping that the SPI bus is up for high speed writes - these serial buses traditionally have lower limits. But part of the reason I am doing this project is to get myself up to s
  3. Thank you @jpeyron for your comments. In view of the requirements, are there any boards which have a better feature set for this project ? Or are you working purely on the basis of cost ? I would hope that respondents would be able to advise me something along the lines of :- <suggested format for recommend> Yes, Board X will do your job as it has enough RAM and a good enough clock to do your I/O. It might not do the DAC as well, due to bandwidth constraints. Board Y would do the bandwidth for DAC as well as the rest. The SD interface is doable by all the boards. The powe
  4. Hi Dan, Yes, the video stream is monochrome (i.e. greyscale) and contains no colour information. I believe that most framegrabbers / video in cards do require the colourburst on the front porch to operate successfully. So for any DAC out I will need to provide this. Regards, Tony Barry Sydney, Australia
  5. Hi Dan, Thank you for your posting. The camera fortunately provides a digital stream already. It clocks at 28.656MHz, which is fairly fast, and is an 8-bit parallel path with two signalling lines (one for hSync, one for vSync). The interconnect can't be longer than about 50cm (18inches) unless it's an impedance matched path. Regards, Tony Barry Sydney, Australia
  6. Hi @jpeyron, The 3v3 point can easily be solved with an octal voltage buffer. My main interest is in the "horsepower" needed to move memory around, and keep up with the traffic in and out. If there are any compute cycles left over then I can use them to good effect by doing some stats on frames and performing a "digital stack" (i.e averaging across time). As an aside, I will have a GPS unit in there to provide a decent timebase for recorded image timing. Regards, Tony Barry Sydney, Australia
  7. Howdy to the Digilent-using people, Tony Barry writing. I am new to FPGA, but have a fairly strong background in EE and microcontrollers, C and assembler (mainly x86 but also Atmel AVR). My project is pro-bono for the amateur astronomy (occultation observing) community. Briefly, the occultation community observe the passage of asteroids in front of (generally dim) stars, and time the moment of eclipse and the moment of reappearance using strict UT timestamps to determine the position and possibly the shape of the asteroid from the knowledge of the time of the event, and the positio