theUltimateSource reacted to Ciprian in Video capture in Petalinux on Zybo
Hi @Ben B,
Regarding your question on using Zybo Z7-20 to capture HDMI signals. It is possible and using UIO is also an option, but because we are using the VDMA to get the Video signal it's better to use a DMA driver. Unfortunately Xilinx does not provide a complete DMA driver for any of their DMA IPs, therefore I have been using this DMA driver which includes the VDMA functionality as well. To make things as easy as possible, I generated a example project for you with the VDMA used to capture video streams and OpenCV functions to write a *.bmp file.
What you need to do in order to get it working is:
1. load the HDMI2BMP.elf to /home/root on your rootfs portion of your board
2. after the board boots you need to load the axi_dma_driver
root@Zybo-Z7-20:~# insmod /lib/modules/4.9.0-xilinx-v2017.4/extra/xilinx-axidma.ko 3. run the HDMI2BMP.elf
This will generate a test.bmp in /home/root with the captured image.
The source file for the app is in the SDK folder. Changes which I had to do to the original petalinux project are:
- create a new module in petalinux
petalinux-create -t modules -n xilinx-axidma --enable - copy the necessary file to Petalinux-Zybo-Z7-20/Zybo-Z7-20/project-spec/meta-user/recipes-modules/xilinx-axidma/files and update the MAKE file and the xilinx-axidma.bb
- update the system-user.dtsi in /Petalinux-Zybo-Z7-20/Zybo-Z7-20/project-spec/meta-user/recipes-bsp/device-tree/files
- write the demo program
Hope this helps.
theUltimateSource got a reaction from Ahmed Alfadhel in connecting two 6pin pmods to 12pin connector in IP-Integrator
you are connecting to JC not J1. In your block design you are connecting to JA? 🧐
theUltimateSource got a reaction from Ahmed Alfadhel in error in source code at SDK
depends, I am not familiar with IOMODULE. Your code in SDK is expecting but there are none defined. You either modify your code in SDK or enable interrupt in hardware.
Are you using the DA3? Can you show us the module configuration in hardware and parameters in your BSP (xparameters.h)?
theUltimateSource got a reaction from sbobrowicz in How do I get Ubuntu 16.04.3 LTS?
Ubuntu 16.04.3 LTS can be downloaded here
For the exact variant you should use we need to know the architecture of your CPU (intel, arm, amd, 32b or 64b). You can check this in Win 10 system overview.
To setup Ubuntu in VMWare, download the iso file from the link above. Then create a new VM, mount the iso in your VM, boot it then install it. I am not going into the details for these steps here.
theUltimateSource reacted to JColvin in Part number for Fan?
Hello again @theUltimateSource,
I learned a little more info about the fan; you can use just a two-wire fan (as you probably suspected). The 3-wire fan was originally chosen because the 2-wire fan was thought to be too loud, but maybe that's not a concern for your application.
theUltimateSource reacted to morsucci in Just Memory
It is true that you can use /dev/mem and uio drivers to accomplish the same functionality.
It is almost always a better idea to use uio as a opposed to /dev/mem
Here is why:
using /dev/mem directly opens your system up to security risks. You could be potentially accessing memory that can be harmful to your system. Additionally, other people may be able to exploit this to access memory that they would otherwise not be able to access. UIO provides kernel interrupt functionality. That is: UIO drivers can register interrupts with the kernel and the kernel can recognize when an interrupt has occurred and carry out the assigned task. Currently, the only way you would do this using /dev/mem is through polling of an interrupt register. Polling usually is not always the best approach, especially when you are trying to catch interrupts from FPGA hardware. Regards,
theUltimateSource got a reaction from Jaraqui Peixe in Development Kit for Dynamic Reconfiguration with Vivado
For your information: The partial reconfiguration license is now included in Vivado System Edition and Design Edition seats at no additional cost since 2017.1.
The Partial Reconfiguration feature is also available for purchase for WebPack additions, at a new lower cost.
theUltimateSource got a reaction from yassinema2018 in Zybo placing error
I think there is a confusion. I am not talking about IO buffer (i.e., "physical ports") here. A port list is a list of inputs and outputs of your module as you declared here:
Vivado needs a top module. The top module contains a port list that Vivado is going to wire to physical pins. Your top module is pwm that's why Vivado does what it did. Instead, use a top module that instantiates axi and pwm like so:
top_module ( output pwm_out, inout DDR_... ... inout FIXED_IO... ... ); Vivado tries automatically to figure out which is your top module. If you have more than one hierarchie it picks whatever. In this case you can manually tell Vivado which your top module is.
To put it simple: remove all inputs and outputs in your top module that you don't want Vivado to wire at pins.
theUltimateSource got a reaction from jpeyron in cannot connecto to terminal on Zybo Z7
I searched for inactive driver in the Windows device manager and found out that there appear 2 x USB Serial Converter A and 2 x USB Serial Converter B. I deleted all of them and powered the board. Now both boards work.
theUltimateSource reacted to JColvin in Best Vivado license option on Zedboards
Yes, you can wait to generate the license. Once you generate the license, you will have a year to update to any newer versions that Xilinx puts out during that time. After the one year is up, you won't be able to further upgrade to newer versions without purchasing access to a new license, but you will be able to keep and continue to use the current license on your machine.
Naturally, before you activate the license (for presumably the Design Edition), you will need to use the WebPACK version of Vivado from Xilinx.