kondzio9224

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About kondzio9224

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  1. Hi @jpeyron, Thank You - I will wait, Konrad
  2. This module I am trying to run on ZYBO and only 800x600 1024x768 and 1280x720 resolutions look good. module hdmi_receiver_phy #( parameter reg kEmulateDDC = 1'b1, // will emulate a DDC EEPROM with basic EDID, if set to yes parameter reg kAddBUFG = 1'b1, // true, if PixelClk should be re-buffered with BUFG parameter kClkRange = 2, // -- MULT_F = kClkRange*5 (choose >=120MHz=1, >=60MHz=2, >=40MHz=3) parameter kEdidFileName = "720p_edid.txt", // Select EDID file to use // 7-series specific parameter kIDLY_TapValuePs = 78, //delay in ps per tap parameter kIDLY_TapWidth = 5 //number of bits for IDELAYE2 tap counter ) ( input wire hdmi_clk_p, input wire hdmi_clk_n, input wire [2:0] hdmi_d_p, input wire [2:0] hdmi_d_n, output wire hdmi_hpd, output wire hdmi_out_en, inout wire hdmi_scl, inout wire hdmi_sda, input wire clk, input wire rst_btn, //output wire [9:0] hdmi_data_out_ch0, //output wire [9:0] hdmi_data_out_ch1, //output wire [9:0] hdmi_data_out_ch2, //output wire PixelClk_out, //output wire pVde, //output reg new_frame, //output reg new_frame_60, //output wire aPixelClkLckd, //output wire all_rdy, output wire [5:0] vga_g, output wire [4:0] vga_b, output wire [4:0] vga_r, output wire vga_hs, output wire vga_vs ); wire [23:0] vid_pData; wire vid_pHSync; wire vid_pVSync; wire ddc_sda_i; wire ddc_sda_o; wire ddc_sda_t; wire ddc_scl_i; wire ddc_scl_o; wire ddc_scl_t; dvi2rgb #( .kEmulateDDC(kEmulateDDC), .kAddBUFG(kAddBUFG), .kClkRange(kClkRange), .kEdidFileName(kEdidFileName), .kIDLY_TapValuePs(kIDLY_TapValuePs), .kIDLY_TapWidth(kIDLY_TapWidth) ) dvi2rgb_i ( .TMDS_Clk_p(hdmi_clk_p), .TMDS_Clk_n(hdmi_clk_n), .TMDS_Data_p(hdmi_d_p), .TMDS_Data_n(hdmi_d_n), .RefClk(clk), .aRst_n(~rst_btn), .vid_pData(vid_pData), .vid_pVDE(pVde), .vid_pHSync(vid_pHSync), .vid_pVSync(vid_pVSync), .PixelClk(PixelClk_out), //.all_rdy(all_rdy), //.hdmi_data_out_ch0(hdmi_data_out_ch0), //.hdmi_data_out_ch1(hdmi_data_out_ch1), //.hdmi_data_out_ch2(hdmi_data_out_ch2), .SerialClk(), .aPixelClkLckd(aPixelClkLckd), .DDC_SDA_I(ddc_sda_i), .DDC_SDA_O(ddc_sda_o), .DDC_SDA_T(ddc_sda_t), .DDC_SCL_I(ddc_scl_i), .DDC_SCL_O (ddc_scl_o), .DDC_SCL_T(ddc_scl_t), .pRst_n(~rst_btn) ); IOBUF IOBUF_hdmi_scl ( .I(ddc_scl_o), .O(ddc_scl_i), .T(ddc_scl_t), .IO(hdmi_scl) ); IOBUF IOBUF_hdmi_sda ( .I(ddc_sda_o), .O(ddc_sda_i), .T(ddc_sda_t), .IO(hdmi_sda) ); assign vga_g = vid_pData[7:2]; assign vga_b = vid_pData[15:11]; assign vga_r = vid_pData[23:19]; assign vga_hs = vid_pHSync; assign vga_vs = vid_pVSync; assign hdmi_hpd = 1'b1; assign hdmi_out_en = 1'b0; /* reg last_vsync; always @(posedge PixelClk_out) begin last_vsync <= vid_pVSync; if (vid_pVSync == 1'b1 && last_vsync == 1'b0) begin new_frame <= 1'b1; end else begin new_frame <= 1'b0; end end reg [5:0] temp; always @(posedge PixelClk_out) if(rst_btn == 1'b1) begin temp <= 6'd0; new_frame_60 <= 1'b0; end else begin if(new_frame == 1'b1) temp <= temp + 1'b1; if(temp == 6'd59) begin temp <= 6'd0; new_frame_60 <= ~new_frame_60; end end */ endmodule
  3. Here is the link to my google drive https://drive.google.com/open?id=0BwV4sdde6ENiU2l6TmM1RlVXNUk - there is project in vivado and an IP Core which includes dvi2rgb inside. But even if I try to use only dvi2rgb ipcore wideo for 1280x1024 and bigger resolutions are bad. "Are you using the AXI_DynClk IP core from vivado-library? If you haven't already, referring to the Zybo HDMI IN demo may help." - I don't use AXI_DynClk IP core. Thank You:)
  4. Hi Everyone, I was trying to capturing hdmi signal and display video on VGA monitor using DVI to RGB IP Core (version 1.6 or 1.7). Everything works correctly for 800x600 1024x768 and 1280x720. But for other resolutions (1280x1024 1600x900 1680x1050 and 1920x1080) image on external VGA monitor has very poor quality. Could anyone suggest where is the problem. In dvi2rgb spec I've found info about constraining tmds clock so based on my calculation for ZYBO IP Core should work correctly for 1680x1050 resoultion (tmds clock is about 120). I am using this IP Core in bigger project and I need to explain where is the problem. I can also upload my project in Vivado. Thanks for any help
  5. Hi All, I have bought ZYBO board. I create simple block design and now I am trying to write 1MB (and more) of data on sd-card. My simple bare-metal apllication code: #include <stdio.h> #include <stdlib.h> #include "platform.h" #include "xil_printf.h" #include "ff.h" #include "xsdps.h" #include "stdio.h" #include "ps7_init.h" int main() { static FATFS FS_Instance; static FIL file1; static char FileName[32] = "F1.txt"; static char *Log_File; FRESULT result; TCHAR *Path = "0:/"; unsigned int BytesWr; init_platform(); ps7_post_config(); u32 transfer_size = 1024*1024; u8 *wr_buff; wr_buff = malloc(transfer_size); xil_printf("Mount device...\n\r"); result = f_mount(&FS_Instance, Path, 1); if (result != 0) { xil_printf("Error! f_mount %d\n\r", result); return XST_FAILURE; } Log_File = (char *)FileName; xil_printf("Create file Frame.txt...\n\r"); result = f_open(&file1, Log_File, FA_CREATE_ALWAYS | FA_WRITE); if (result != 0) { xil_printf("Error! f_open %d\n\r", result); return XST_FAILURE; } xil_printf("Write some data on sd card...\n\r"); result = f_write(&file1, (const void*)wr_buff, transfer_size, &BytesWr); if (result != 0) { xil_printf("Error! f_write %d\n\r", result); return XST_FAILURE; } result = f_close(&file1); xil_printf("Close file...\n\r"); if (result != 0) { xil_printf("Error! f_close %d\n\r", result); return XST_FAILURE; } cleanup_platform(); return 0; } Terminal outputs: Mount device... Create file Frame.txt... Write some data on sd card... Error! f_write 1 So problem is in f_write function. This code works fine for 1KB data size. I dont't know what am I doing wrong. Can You help me?