dbkincaid

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Everything posted by dbkincaid

  1. @attila I saw your reply to another user that requested UART log directly to file. I have the same request for my Digital Discovery, but I am not running at a standard rate (UART 4MHz) so I cannot use the protocol analyzer. I am able to do normal "logic" capture and set up UART on the line at the 4M rate. This decodes properly but I cannot capture all the transaction series with one capture. I would like to be able to capture the decoded UART bytes directly to file until I stop the capture. (I am not interested in the digital lines) I would also like to be able to set up two UAR
  2. Thanks Attilia I was able to force a Run Configuration and it seems to connect now
  3. I have some sort of target conflict when using my Digital Discovery and my Xilinx ZCU-104 board. The Xilinx board will not properly reset and detect from the SDK tool (Hardware Manager works, but I have to run my project from SDK) I have not had any problems with conflict when using my Zybo Z7 with the Digital Discovery. At this time, to get my target running I have to disconnect the Digital Discovery then Initialize the ZCU board. After it has started I can reconnect my Digital Discovery and it works as expected. This workaround is not very good, plugging and unplugging har
  4. I upgraded from an Arty/Pynq to the Zybo because it has HDMI cable hider devices help stabilize HDMI Rx on the board. I am able to run 1080P consistently, even though the firmware reports timing errors on my board. Other boards may be worse.
  5. Great I am looking forward to it (I downloaded 3.8.2 a minute ago but did not see the new feature, I will watch for a new update)
  6. I work in a partially lit room to make it easier on my eyes. The LEDs on the Digital Discovery are extremely bright, particularly when triggering. Is there any way to dim or disable these lights? I use the Waveforms tool for everything, I was hoping to have a configuration there.
  7. dbkincaid

    Zybo Z7 UART0

    I am trying to add UART0 on to the PMOD JF connection (the PS PMOD) I have configured this in the Zynq on the block design. I select MIO 10/11 as the UART pair but no matter what I have tried the BSP that is generated does not contain UART0 (I am trying to add this to an existing SDK project, bare metal) Any ideas that I can try?
  8. I have both a Pynq and a ZyboZ7. The Pynq has been able to run Arty examples, and the XDC files are basically identical. There might be one peripheral change (microphone?) but everything else that I can remember is 1:1. I don't have any experience with PetaLinux, but I think if you want to go that direction you should try to find a group of users or examples for your board. The most likely place will be on Arty or Zybo. Pynq is more or less marketed to Jupyter users and research. One last thing, if you are looking into video HDMI I would recommend the ZyboZ7 because it has 'cable
  9. I created two Vivado IP's for this purpose. One is PMOD out and the other is PMOD in. The verilog is basically wire in and assign out. This way I can map the 'PMOD' interface on the block design and connect to one of the PMOD board components. -Brian
  10. Ok I wondered if I was the only one with the issue. I was able to work around, I was actually kinda hoping for a TCL guru to pop-in and say oh if you want to auto-update all IP's just write blah blah blah Is the new release going to be 2016.4 or 2017.4?
  11. I'm on ZYBO-Z7-20 The file I have is Zybo-Z7-20-HDMI-2016.4-1.zip it's 135MB, and was created Nov 6, 2017 I'm almost completely certain I downloaded the zip from the page.
  12. I would love to see a PMOD USB to HID that could work as either a controller (takes input from HID devices) or as a slave (meaning, it acts like a keyboard or mouse) The pro micro arduino does this and I have one. It's pretty great, but not in a PMOD format.
  13. Juan, When learning/frustrated with Zynq I had the same questions. The main thing is that the system clock will typically come from a Zynq processor block. I would encourage you to drop down a Zynq block and use AXI_GPIO blocks to talk to each other to start off. As an example set up one as output only and the other as input only. This will simplify your (C) program. These blocks will route themselves on the block design using the automation tool. When you have learned the basics of using the GPIO blocks in the SDK (C) you will be ready to do lots of general communication and easier
  14. Hi Jon, I'm on 2016.4. When you move to 2017.4 I'll also move all my projects over.
  15. Pujith, Also when you add the PMOD to your design you might have some issue with Vivado's handoff to the SDK. Most errors can be cleared by rebuilding the BSP (right click option) in the SDK. I had a problem where I actually had to delete the BSP from the SDK project and then create a new BSP (with the exact same name), then the project was able to correctly build the BSP with the new PMOD.
  16. When building the HDMI project using the Vivado TCL command line I get errors after the block design section when the script attempts to build a wrapper. The source of the issue is that the block design pulls a HDMI core that is older than the one in my repository, so there is a 'update library' warning/error but it crashes the build with errors downstream. I was successful with a workaround by breaking the build into (everything to block design).tcl and (everything after block design).tcl and I update the IP on the block design in between. I was hoping someone more familiar with
  17. Awesome, this is what I needed. SDK seems to have a lot of 'hold your tongue just right...' things. It's a bit of learning curve and I would not consider myself a novice programmer.
  18. I am attempting to build upon the hdmi demo, here is what I want to accomplish: Take over PMOD_C port as a general purpose digital output (8 pins) Here is what I have done (aside from debugging for hours) I dropped down and wired a PmodGPIO_0 block in my design and connected it to PMOD_C (JC), used the auto-connection automation function in Vivado. The build seems to work just fine, exported hardware, etc as normal. In SDK I get a drivers/ directory in hw_patform_1 with PmodGPIO_v1_0 and everything looks fine. Here are the exact steps I followed from here to whe
  19. Ah, thanks for the hint! The GPIO I put together ended up on EMIO 31:0 which mapped to XGpioPS 2 (not GPIO_0 as the Zynq7 indicated). Once I changed the two lines that referenced the port it works!
  20. Hello, I am having trouble with the last bit of my project where I have modified the video_demo of the Arty_Z7 example I added a 32bit GPIO to the Zynq7 in Vivado and exported it to the SDK. Note I am 'not' using the AXI, I am using the direct GPIO access. The .bit is automated from the block design. I have read and re-read the example in SDK for initiating a port read for this XGPIOPS Here is the code I think has an issue: (at define block and globals) #define GPIO_DEVICE_ID XPAR_XGPIOPS_0_DEVICE_ID XGpioPs Gpio; /* The driver instance for GPIO Device. */ (at beg