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elodg last won the day on August 5

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About elodg

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  1. I sent a PM to @manboy and @Paul Chang on this matter.
  2. The prototypes have been verified, and we got entangled in support for 2020.1. Sorry, I do not have a better timeline.
  3. It could be that 25MHz is some propagated value but starting with 100MHz MIPI clock from MIPI_DPHY_Receiver_ooc.xdc (out-of-context synthesis) and 84MHz is calculated from a MIPI clock constrained in the top-level design. I think this is missing constraints bug in the demo projects. We will look into it.
  4. So cable drivers must be installed if you can program the FPGA. As to why you cannot run Hello world, check the logs for clues on whether elf download succeeds and could even try debug to see where the processor is stuck at. SDK terminal show a crash of some sort.
  5. Did you forget to install the cable drivers perhaps? https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug973-vivado-release-notes-install-license.pdf#G5.401934
  6. I don't think what you are trying to do is possible. Library xfopencv, Xilinx's OpenCV implementation for HLS, much like the original one assumes there is an OS.
  7. That does not sound right. All the functions the PMCU serves is described in the reference manual, which include important ones like VADJ control or thermal cooling control. If LD21 does not blink on power-up the wake-up pattern, the PMCU is either missing its firmware or is otherwise damaged. If there is still a bootloader in it, we can try a firmware upgrade through USB-UART, not J38. A colleague of mine will PM you with the instructions. If firmware upgrade fails we will do an RMA. Is there a change the PMCU has been erased using an programming cable through J38?
  8. Frustratingly, I could never find the equation that worked consistently across resolutions for the HS values the camera uses. The sensor datasheet is not exactly verbose on the matter. Xilinx MIPI DPHY IP support is expected together with UltraScale+ support in a month or so. You can try setting a large value in the sensor for HS_ZERO, and try increasing HS_SETTLE in D-PHY Rx until it works.
  9. We are looking at the build issues you are having to see if we can reproduce them. The issue with two cameras not working is most probably not related, however. Mechanical durability for mating is at least 30 cycles. Re-check cabling, maybe swap Pcams between ports. Also check if there are any messages on the console related to the initialization sequence. There might be errors reported for the non-working cameras.
  10. You are on the right track. The settings that control the timing of the low-power high-speed transition need to match between the transmitter and receiver. It is easier if you scope it, triggering on an LP-10 state and measuring the time it takes for the sensor to switch to high-speed. The following registers control the camera timing: //MIPI timing // [5]=0 T_LPX global timing select=auto pclk2x {0x4805, 0x10},//Default=0x10 //T_HS_ZERO = MIN HS ZERO + T_UI*MIN HS ZERO_UI //MIN HS ZERO H (ns) {0x4818, 0x00},//Default=0x00 //MIN HS ZERO L (ns) {0x4819, 0xFF},//Default=
  11. elodg

    Pcam Visible Border Line

    You can try editing the AXI_BayerToRGB or replacing it with Xilinx's demosaic IP. You can try interpolation with duplicated margin, for example. You are on your own.
  12. elodg

    Pcam Visible Border Line

  13. elodg

    cmod S7 zyboZ7 connection

    UART over Pmod.
  14. elodg

    cmod S7 zyboZ7 connection

    Sending it to a PC first then to the ZyboZ7 through two USB-UART connections.
  15. See Supported Devices in https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_1/ug973-vivado-release-notes-install-license.pdf. Pre-7 series devices, like CoolRunner-II are not supported in Vivado.