bogdan.deac

Hi @Esti.A, If you clone the repo you obtain the "source code" for the platform and you have to generate the platform by yourself. This is a time consuming and complicated task and is not recommended if you do not understand SDSoC very well. I advise you to download the last SDSoC platform release from here. You will obtain a zip file that contains the SDSoC platform already build. After that, you can follow these steps to create your first project.

Hi @Esti.A, 1. What Xilinx tools version do you use? 2017.4 or 2018.2? 2. How did you obtain the SDSoC platform? Did you clone from here or did you download the archive from release tab?

Hi @Esti.A, SDx, which includes SDSoC (Software Defined System on Chip), is a development environment that allows you to develop a computer vision application, in your case, using C/C++ and OpenCV library. The target of SDx-built applications are Xilinx systems on chip (SoC) (Zynq-7000 or Zynq Ultrascale+). Xilinx SoC architecture has two main components: ARM processor (single or multi core) named Processing System (PS) and FPGA, named Programmable Logic (PL). Using SDx to build an application for SoC allows you to choose which functions from your algorithm are executed in PS and which ones are executed in PL. SDx will generate all data movers and dependencies that you need to move data between PS, DDR memory and PL. The PL is suitable for operations that can be easily executed in parallel. So if you are going to choose a median filter function to be executed in PL, instead of PS, you will obtain a better throughput from your system. As you said, you can use OpenCV to develop your application. You have to take into account that OpenCV library was developed with CPU architecture in mind. So the library was designed to obtain the best performance on some specific CPU architectures (x86-64, ARM, etc.). If you are trying to accelerate an OpenCV function in PL using SDx you will obtain a poor performance. To overcome this issue, Xilinx has developed xfopencv, which is a subset if OpenCV library functions. The functionalities of xfopecv functions and OpenCV functions are the same but the xfopencv functions are implemented having FPGA architecture in mind. xfopencv was developed in C/C++ following some coding guideline. When you are building a project, the C/C++ code is given as input to Xilinx HLS (High Level Synthesis) tool that will convert it to HDL (Hardware Description Language) that will be synthetized for FPGA. The above mentioned coding guideline provides information about how to write C/C++ code that will be implemented efficiently in FPGA. To have a better understanding on xfopencv consult this documentation. So SDx helps you to obtain a better performance by offloading PS and by taking advantage of parallel execution capabilities of PL. Have a look on SDSoC documentation. For more details check this. An SoC is a complex system composed by a Zynq (ARM + FPGA), DDR memory and many types of peripherals. Above those, one can run a Linux distribution (usually Petalinux, from Xilinx) and above the Linux distribution, the user application will run. The user application may access the DDR memory and different types of peripherals (PCam in your case). Also, it may accelerate some functions in FPGA to obtain a better performance. To simplify the development pipeline Xilinx provides an abstract way to interact with, named SDSoC platform. SDSoC platform has two components: Software Component and Hardware Component that describes the system from the hardware to the operating system. Your application will interact with this platform. You are not supposed to know all details about this platform. This was the idea, to abstract things. Usually, the SDSoC platforms are provided by the SoC development boards providers, like Digilent. All you have to do is to download the last SDSoC platform release from github. You have to use SDx 2017.4. You don't have to build your own SDSoC platform. This is a complex task. You can follow these steps in order to build your first project that will use PCam and Zybo Z7 board. The interaction between PCam and the user application is done in the following way: there is an IP in FPGA that acquires live video stream from the camera, the video stream is written into DDR memory. This pipeline is abstracted by the SDSoC platform. The user application can access the video frames by Video4Linux (V4L2). The Live I/O for PCam demo shows you how to do this. I suggest you to read the proposed documentation to obtain a basic knowledge needed for SDSoC projects development. Best regards, Bogdan D.

Hello, Unfortunately, I cannot reproduce the error that you get. In this point I have two suggestions: 1. Try to build the project on a linux-based system, maybe using a virtual machine (this will slow down the building process). 2. Post this issue on Xilinx forum. They should have a better knowledge about the errors that may appear on Windows-based systems. Best regards, Bogdan D.

As far as I know the NN training phase takes long time and needs many resources. For this reason it is not recommended to train NN on FPGAs. On the other hand, FPGA is strong in inference. I advise you to use GPU and a learning framework, like Caffe, for the training phase. Fortunately, Xilinx released recently a new development kit for NN named Deep Neural Network Development Kit (DNNDK). Here you have the user guide and the DNNDK extension for SDSoC. Have a look on the Xilinx documentation and forum posts to get familiar with all concepts. Let us know if you have any questions.

Hello, I have some troubles to build the project in SDx on Windows. I get a weird error message: The system cannot find the file specified. This message appears for every project that I try to build using Zybo Z7 reVision platform. It seems to be a configuration issue. I am working to solve this. I didn't face this problem on Linux before.

Hi, I am trying to reproduce your error. On Linux-based system everything works fine. I am going to try on Windows as well. I will come back with a response as soon as possible.

Hi, Vivado can't find 'c:/LS1/LS1/Debug/_sds/p0/_vpl/zybo_z7_20.ipdefs/repo_0'. Can you verify that the path is valid? Can you reach repo_0 directory from File Explorer? What does repo_0 directory contain?

From the log file that you have provided I figured out that the problem is not related to reVision platform nor project itself. It is a Xilinx general issue that manifest on Windows platforms. The following message from the log file is explicit This info message is followed by some warning messages that in the end will cause the build to fail. Because the path to those IPs is too long the system cannot find them and the build process fails. As you can see here, it is a Vivado design problem. You can find the solution here. Try to follow the steps from the link and rebuild the project. The warning messages about the path length should not appear again.

Did you create the SYSROOT environment variable? Did you restart the PC after variable creation?

How did you get the reVision platform? Did you clone it from github OR did you downloaded the zip archive from releases tab?

How did you import the project? Did you create an empty application and copied the github code into it OR did you start from the live_IO template?

Hi @Sameer120, What example project did you run? Did it build properly? What OS do you use?

The first error message is explicit: unsupported pointer reinterpretation from type 'i32*' to type 'i8*' on variable 'frm_data_in' frm_data_in argument is a pointer to uint32_t data but you have provided a pointer to 8-bit data when you called the filter2d_cv function. Solve the error and try to build again.

Attach the log file. I cannot understand the errors from the screenshot.