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Posts posted by jpeyron
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Welcome to the Digilent Forum!
I sent you an PM about this.
best regards,
Jon
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Hi @CaptFraz,
We still do not have 3D CAD files available for the Cora Z7. I have passed on your request to our content team.
best regards,
Jon
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Hi @shyams,
When I looked further into the helloworld.c it appears that the interrupt functionality is not being used.
I created a Arty-A7-35T Vivado 2018.2 gpio interrupt project here using the xgpio_intr_tapp_example.c provided by xilinx SDK code found here: C:\Xilinx\SDK\2018.2\data\embeddedsw\XilinxProcessorIPLib\drivers\gpio_v4_3\examples.
Looking at the main function of the xgpio_intr_tapp_example.c the main function does not poll for data but rather uses the GpioIntrExample function.
I have attached screen shots of the Vivado block designs.
Spoilerint main(void)
{
int Status;
u32 DataRead;print(" Press button to Generate Interrupt\r\n");
Status = GpioIntrExample(&Intc, &Gpio,
GPIO_DEVICE_ID,
INTC_GPIO_INTERRUPT_ID,
GPIO_CHANNEL1, &DataRead);if (Status == 0 ){
if(DataRead == 0)
print("No button pressed. \r\n");
else
print("Successfully ran Gpio Interrupt Tapp Example\r\n");
} else {
print("Gpio Interrupt Tapp Example Failed.\r\n");
return XST_FAILURE;
}return XST_SUCCESS;
}best regards,
Jon
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Hi @shyams,
Welcome to the Digilent Forums!
I have attached screen shots of the block design for the Vivado 2018.3 version of the Arty-A7-gpio interrupt project. I attached the SDK code as well.
best regards,
Jon
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Hi @mustafasei,
Did you follow this YouTube Video when trying to get the LINX project working?
Does the Arduino show up in the device manager?
Did you select the com port for the Arduino you are using in the LINX device settings?
best regards.
Jon
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Hi @mustafasei,
Here is a LabVIEW MakerHub forum thread that discussed having a PI controlling an Arduino.
best regards,
Jon
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Hi @huytergan,
I would suggest looking at the Basys 3 GPIO demo The GPIO demo is done in VHDL and it uses the USB UART bridge. Here is the UART_TX_CTRL.vhd.
best regards,
Jon
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Hi @Tim S.,
I reached out to a co-worker that got the same error as you. We dug further into my licenses and it turns out that I have the MIPI licenses and that is why i was not having issues. We also reached out to our content team which suggested to utilize the petalinux releases which include already generated bitstreams and hardware information so you would not need the licenses.
As it stands now it sounds like if you are wanting to instead alter the linux base design or use the linux base design for a different linux platform then you would either need to strip out the licensed content or purchase the licenses.
In the next few days I will be working on verifying that the petalinux release will not have the licensing issues that are in having in the zybo z7 20 base linux design.
best regards,
Jon
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Hi @Tim S.,
The IP Cores provided by Digilent should not have a cost. Here is a forum thread that describes these MIPI altered IP Cores. Are you able to generated a bitstream with the Zybo Z7-20 PCAM-5C project here(use the Vivado 2017.4 version)? I believe this project uses the same altered MIPI IP Cores.
best regards,
Jon
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Hi @Tim S.,
What version of Vivado are you using?
The Zybo-Z7-20-base-linux project was created for and using Vivado 2017.4.
best regards,
Jon
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Hi @Tim S.,
I was able to generate a bitstream using the zybo z7 base linux project from here.
1) I downloaded the project and then downloaded the vivado library and put the contents of the vivado library in the repo/vivado_library folder.
2) I then loaded the project in vivado 2017.4.
3) Then i upgraded/generated the IP cores using the report ip status under tools.
4) I then had to create a wrapper after which i was able to generate a bitstream without an issue.
best regards,
Jon
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Hi @rzsmi,
The content team is aware that the Pmod WIFI has errors when using Vivado/SDK 2018.2 and Vivado/SDK 2018.3. They will address this issue when they have bandwidth. Unfortunately we do not have an ETA for when this will be done. The current suggestion/solution is to use Vivado 2017.4. We are sorry for any inconvenience this may cause.
best regards,
Jon
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Hi @Dimple,
Unfortunately it sounds like the regulator is broken. I have PM'd you more about this issue.
best regards,
Jon
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DXF/CAD files for CORA Z7 board
in FPGA
Posted
Hi @CaptFraz,
Unfortunately we do not have a dimensional engineering drawings for the Cora Z7.
best regards,
Jon