jpeyron

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Posts posted by jpeyron


  1. Hi @Dom_123,

    I was able to verify a Vivado 2018.2 Basys 3 Pmod HYGRO project here.  I have attached a screen shot of the tera term output which is updating/changing. Please download this project and see if you get the expected results.

    best regards,

    Jon

    basys3_Pmod_HYGRO.jpg


  2. Hi @moreabhinav,

    As described above in the diagram the PS is directly tied to  the USB UART.  Its my understanding that to use HDL(Verilog/VHDL) to send data through the USB UART  on a ZYNQ chip you would need to facilitate communication and the command protocols to and from the ARM processor. You would still be using the PS to send and receive date through the USB UART.  

    Can you be more specific about your project needs? 

    best regards,

    Jon

     

     


  3. Hi @Dom_123,

    1) Are you talking about the Pmod HYGRO IP core example here?

    2) Please provide a screen shot of the serial terminal output, Vivado block design as well as your wrapper, xdc and SDK code.

    3) The Pmod WIFI IP and Pmod HYGRO IP Core and can be found in the Vivado library.  Here is the Getting Started with Digilent Pmod IPs tutorial. Make sure that you have installed the digilent board files as described here

    4) What version of Vivado are you using?

    best regards,

    Jon


  4. Hi @ts808,

    Welcome to the Digilent forums!

    I think SDR projects are interesting. 

    I do not believe that changing the power will change the range. Here is the resource center for the Pmod ESP32. Here is the  datasheet for the ESP32 and here a well documented AT command set PDF.

    I did not see a configuration that would alter the TX/RX frequency range.

    I did find a GitHub project Digital AM Radio Reception using Digital LVDS Inputs as 1-bit ADC that uses the Nexys 4 that might be helpful with your project.

    This site might be an non-digilent option for using SDR. 

    best regards,

    Jon


  5. Hi @Dom_123,

    Welcome to the Digilent Forums!

    I split this thread and started a new topic since its with a different board. This sounds like an interesting project.

    You will need to use an SD card reader something like the Pmod MicroSD to use the HTTPServer example for the Pmod WIFI IP Core.

    You should not need an SD card for the other Pmod WIFI IP Core examples.

    best regards,

    Jon

     

     

     

     


  6. Hi @mzin92,

    I reached out to one of our design engineers about your thread and they responded :

    "For discrete parts without part number in the attached excel spreadsheet see the following requirements:

    All ceramic capacitors are temperature coefficient X5R, X7R or C0G, unless specified otherwise.
    Capacitors without maximum voltage rating are 6.3V or greater.
    Capacitors without tolerance specification are 10% (20% if 10% is unavailable) or better.
    Resistors without power rating are 1/16W or greater.
    Resistors without tolerance specification are 5% or better."

    best regards,

    Jon
     

    CMOD_A7_CAPS_AND_INDUCTORS.xlsx


  7. Hi @moreabhinav,

     

    Welcome to the Digilent Forums!

    To clarify, you are wanting to send and receive data between a PC and the Zedboard through the USB UART Bridge. The connector labeled UART ( J14 ). 

    The Zedboard has a ZYNQ processor. The USB UART bridge is connected directly to the ZYNQ Processor. Although it is not impossible to use the USB UART Bridge with VHDL/Verilog it is not a trivial task.

    I would suggest using the ZYNQ Processor to accomplish your task. The following steps will help you get a basic project using the USB UART bridge:

    1) Make sure you have installed the Digilent board files. 

    2) create a project and then a block design.

    3) Add the Zynq processor to the block design.

    4) Run block automation using the default settings which will be the board files

    5) Tie the FCLK_CLK0 pin to the M_AXI_GP0-ACLK pin

    6) right click on the block design in the sources tab and create a wrapper.

    7) generate a bit stream, export the hardware including the bit stream and launch SDK

    8). once in SDK create and application and select the hello world template. 

    9) Program the FPGA and right click on the application and run as -> launch on hardware(system debugger)

    Here is a slightly different tutorial that has the USB-UART bridge being used. 

    best regards,

    Jon 

     

    ZYNQ.jpg