jpeyron

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Posts posted by jpeyron


  1.  Hi @HighEndCompute,

    I split your thread so that we can continue discussing this issue on a non closed thread.  

    1) Make sure the Jumper JP5 next to the power switch set to USB and the Mode Jumper JP4 is set to JTAG.

    2) Next download Adept 2 here. Plug the USB A to micro B cable into the PYNQ-Z1 and a USB port on your PC.

     3) Open Adept 2.  Does adept 2 recognize the PYNQ-Z1 as shown in the screen shot below?

    image.png.23c3f1d5a69c1f9ab1c15ca1057e2d9e.png

     

    4) Have you tried using different USB A to Micro B cables and USB ports on the PC? 

    best regards,

    Jon

     

     


  2. Hi @Justen,

    Our content team confirmed there was a typo in the board files causing an issue with the on board LEDs for the Genesys 2. I fixed the typo on our GitHub.

    There are 2 ways you can fix this issue. Either edit the xml file using a text editor. The board.xml file can be found here "vivado-boards\new\board_files\genesys2\H\board.xml" on line 424 from:

    TRI_O

    to 

    TRI_T

    or re-download the board files from the Digilent GitHub here.

    thank you for letting us know about this issue. 

    best regards,

    Jon 


  3. Hi @Tim S.,

    We do not have more in depth guides or documentation that would better describe using the xilinx drivers. I would suggest looking C:\Xilinx\SDK\2018.3\data\embeddedsw\XilinxProcessorIPLib\drivers at to better understand how xilinx uses their IP cores.

    We would also suggest reaching out to Xilinx support about using their drivers as well.

    best regards,

    Jon


  4. Hi @Zorroslade000,

    On step 4.8 of the Getting Started with the Vivado IP Integrator

    1)  In the Vivado block design add an additional uart lite ip core by clicking on the plus sign.

    2) right click on the uart port on the uart lite and click on "make external"

    continue with the tutorial until step 5.2.

    1) Add a constraint file by copying the Arty-A7-35T master XDC from ther XDC here.

    2) Open the wrapper and find the signal names used for the uart rx and tx .

    3) In the xdc alter the signal name of the pin/pmod port you would like to use.

    4) un-comment the pins 

    continue with the tutorial and generate a bitstream.

    Once you have launched SDK you will need to make your own code main.c.  Look at the examples at the path here(for Vivado/SDK 2018.3 the path is below):

    C:\Xilinx\SDK\2018.3\data\embeddedsw\XilinxProcessorIPLib\drivers\uartlite_v3_2\examples

    best regards,

    Jon