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Everything posted by jpeyron

  1. jpeyron

    basys 3 WiFi usage

    Hi @Dom_123, I was able to verify a Vivado 2018.2 Basys 3 Pmod HYGRO project here. I have attached a screen shot of the tera term output which is updating/changing. Please download this project and see if you get the expected results. best regards, Jon
  2. Hi @Billel, I have not worked with the DDS Compiler. I was not able to find any examples but I was able to find a non-digilent tutorial here.Here is the DDS Compiler v6.0 LogiCORE IP Product Guide that should be helpful as well. best regards, Jon
  3. Hi @newkid_old, I updated and verified the project linked above for Vivado 2018.3. All you need to do is re-download the project from the link above. cheers, Jon
  4. Hi @moreabhinav, As described above in the diagram the PS is directly tied to the USB UART. Its my understanding that to use HDL(Verilog/VHDL) to send data through the USB UART on a ZYNQ chip you would need to facilitate communication and the command protocols to and from the ARM processor. You would still be using the PS to send and receive date through the USB UART. Can you be more specific about your project needs? best regards, Jon
  5. Hi @Billel, Glad to hear you were able to get the Nexys A7 board added. Thank you for sharing what you had to do. best regards, Jon
  6. jpeyron

    NEXYS 3 frequency meter

    Hi @destinyh, Welcome to the Digilent Forums! I agree with @kwilber. The issue looks to be in the UCF file. 1) Please attach your UCF file as well. 2) Here is the Nexys 3 resource center which has the master UCF file available for download on the middle right of the resource center page. best regards, Jon
  7. Hi @Divvi, Welcome to the Digilent Forums! Here is the Nexys A7 resource center. A 3D model is already done and downloadable at the bottom of the resource center under the Additional Resources section. cheers, Jon
  8. Hi @Nithin, Welcome to the Digilent forums! I moved your post to a section where more experienced AD2/DD/Waveforms engineers look. best regards, Jon
  9. jpeyron

    basys 3 WiFi usage

    Hi @Dom_123, 1) Are you talking about the Pmod HYGRO IP core example here? 2) Please provide a screen shot of the serial terminal output, Vivado block design as well as your wrapper, xdc and SDK code. 3) The Pmod WIFI IP and Pmod HYGRO IP Core and can be found in the Vivado library. Here is the Getting Started with Digilent Pmod IPs tutorial. Make sure that you have installed the digilent board files as described here. 4) What version of Vivado are you using? best regards, Jon
  10. Hi @ts808, Welcome to the Digilent forums! I think SDR projects are interesting. I do not believe that changing the power will change the range. Here is the resource center for the Pmod ESP32. Here is the datasheet for the ESP32 and here a well documented AT command set PDF. I did not see a configuration that would alter the TX/RX frequency range. I did find a GitHub project Digital AM Radio Reception using Digital LVDS Inputs as 1-bit ADC that uses the Nexys 4 that might be helpful with your project. This site might be an non-digilent option for using SDR. best regards, Jon
  11. jpeyron

    basys 3 WiFi usage

    Hi @Dom_123, Welcome to the Digilent Forums! I split this thread and started a new topic since its with a different board. This sounds like an interesting project. You will need to use an SD card reader something like the Pmod MicroSD to use the HTTPServer example for the Pmod WIFI IP Core. You should not need an SD card for the other Pmod WIFI IP Core examples. best regards, Jon
  12. Hi @dry, It looks like you need to adjust your cable speed for iMPACT to work. Here is a way to do it from the command line. Here is a forum thread that discusses how to do this in the GUI. best regards, Jon
  13. Hi @joe3, Welcome to the Digilent Forums! I have moved your post to a section where more experience AD2/WaveForms engineers look. best regards, Jon
  14. Hi @dry, I am thinking this issue is with either ISE 14.7's configuration or the configuration of the VB in regards to the USB. To eliminate the Spartan 3 as a reason for these issues: 1) Please download Adept 2 in you main OS (windows 10). 2) Does Adept 2 recognize the Spartan 3? 3) Are you able to configure the Spartan 3 with the attached s3demo.bit file? best regards, Jon s3demo.bit
  15. jpeyron

    CMOD a7-35t Schematic

    Hi @mzin92, I reached out to one of our design engineers about your thread and they responded : "For discrete parts without part number in the attached excel spreadsheet see the following requirements: All ceramic capacitors are temperature coefficient X5R, X7R or C0G, unless specified otherwise. Capacitors without maximum voltage rating are 6.3V or greater. Capacitors without tolerance specification are 10% (20% if 10% is unavailable) or better. Resistors without power rating are 1/16W or greater. Resistors without tolerance specification are 5% or better." best regards, Jon CMOD_A7_CAPS_AND_INDUCTORS.xlsx
  16. Hi @dry, 1) Just making sure you are not using the Window 10 updated ISE 14.7 here since it only works with Spartan 6 FPGA's. 2) Here is a link to USB basics and troubleshooting through Virtual Box that might be helpful as well. 3) What is the main OS on your PC? best regards, Jon
  17. Hi @watmes, Your 2 options would be to try to replace the ic or buy another dev board. best regards, Jon
  18. Hi @dry, Are you using a Virtual box to run your linux OS? And to verify, this version of the ISE 14.7 you are using. thank you, Jon
  19. Hi @Blake, Unfortunately, @BogdanVanca currently does not have the bandwidth to work on this. We will try to help with updating this project. It will take a little bit of time to get up to speed with the project. Sorry for any inconvenience this may cause. Best regards, Jon
  20. jpeyron

    FMC Breakout

    Hi @mikeWylie, I would also look at the xilinx fmc's. best regards, Jon
  21. jpeyron

    CMOD a7-35t Schematic

    Hi @mzin92, There is no difference in the schematic on page 4 or 7 between the Cmod A7 15T anf the Cmod A7 35T. We do not publicly provide the BOM. What information are you looking for specifically? best regards, Jon
  22. jpeyron

    CMOD a7-35t Schematic

    Hi @mzin92, Welcome to the Digilent Forums! The schematic linked above is for both the Cmod A7 15T and the Cmod A7 35T. The regulator and rail information on page 7 of the Cmod A7 schematic is the same for either version of the Cmod A7 15 or Cmod A7 35T. best regards, Jon
  23. Hi @moreabhinav, Welcome to the Digilent Forums! To clarify, you are wanting to send and receive data between a PC and the Zedboard through the USB UART Bridge. The connector labeled UART ( J14 ). The Zedboard has a ZYNQ processor. The USB UART bridge is connected directly to the ZYNQ Processor. Although it is not impossible to use the USB UART Bridge with VHDL/Verilog it is not a trivial task. I would suggest using the ZYNQ Processor to accomplish your task. The following steps will help you get a basic project using the USB UART bridge: 1) Make sure you have installed the Digilent board files. 2) create a project and then a block design. 3) Add the Zynq processor to the block design. 4) Run block automation using the default settings which will be the board files 5) Tie the FCLK_CLK0 pin to the M_AXI_GP0-ACLK pin 6) right click on the block design in the sources tab and create a wrapper. 7) generate a bit stream, export the hardware including the bit stream and launch SDK 8). once in SDK create and application and select the hello world template. 9) Program the FPGA and right click on the application and run as -> launch on hardware(system debugger) Here is a slightly different tutorial that has the USB-UART bridge being used. best regards, Jon
  24. Hi @watmes, Here is the Datasheet for IC17 ADP2118ACPZ-3.3. On page 6, it describes all of the pins. On page 16, Figure 41 Application Circuit shows an example of how this IC is used. The Figure shows that Vout is a combination of SW 9,10,11 going through the inductor. best regards,
  25. Hi @watmes, Is there any component that is overly hot to the touch? As it stands right now, it sounds like either C180/C179 or IC17 is grounding out. best regards, Jon