diya-

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  1. Hi, Interrupts were registered after changing the IRQ type from level triggered to Edge triggered, but unable to perform read or write operation on DMA register 0x40400000(even after enabling level shifter). xilinx_dma_chan_probe(){ : : xilinx_dma_chan_reset() dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RESET); <- hangs during write/read } trying to read or write to XILINX_DMA_REG_DMACR results in hang
  2. Hi, I am trying to do dma transfer from PS to PL in ZYBO evaluation board. Using sdk example project, i am able to perform data transfer between ps and pl. Pl interrupts are mapped as 61 and 62. I am trying to do similar data transfer using linux driver xilinx_dma.c and axidmatest.c (Linux kernel version 4.4). But driver gets hang if i assign interrupt number 29 & 30 in dts. axi_dma_1: [email protected] { #dma-cells = <1>; compatible = "xlnx,axi-dma-1.00.a"; interrupt-parent = <&intc>; interrupts = <0 29 4 0 30 4>; reg = <0x40400000 0x10000>; clock-names = "s_axi_lite_aclk", "m_axi_sg_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk"; clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>, <&clkc 15>; xlnx,addrwidth = <0x20>; /* xlnx,include-sg ;*/ [email protected] { compatible = "xlnx,axi-dma-mm2s-channel"; dma-channels = <0x1>; interrupts = <0 29 4>; xlnx,datawidth = <0x20>; xlnx,device-id = <0x0>; xlnx,include-dre ; }; [email protected] { compatible = "xlnx,axi-dma-s2mm-channel"; dma-channels = <0x1>; interrupts = <0 30 4>; xlnx,datawidth = <0x20>; xlnx,device-id = <0x0>; xlnx,include-dre ; }; }; axidmatest_1: [email protected] { compatible ="xlnx,axi-dma-test-1.00.a"; dmas = <&axi_dma_1 0 &axi_dma_1 1>; dma-names = "axidma0","axidma1"; }; and kernel msg, unable to request IRQ Is the interrupt number mapped is right ? Any help or suggestion on this,
  3. Hi I am using an evaluation board with ZC702 and implemented an AXI DMA in PL logic(to access DDR connected to PS). we have ported kernel 4.6.0 and used inbuilt axi dma test driver to access DMA in PL. kernel crashes when trying to access PL DMA at address 0x40400000. below is device tree configuration, axi_vdma_0: [email protected]{ compatible = "xlnx,axi-dma-test-1.00.a"; #dma-cells = <1>; reg = < 0x40400000 0x10000 >; xlnx,include-sg = <0x0>; dma-ranges = <0x00000000 0x00000000 0x40000000>; xlnx,num-fstores = <0x8>; xlnx,flush-fsync = <0x1>; xlnx,addrwidth = <0x20>; clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>, <&clkc 15>; clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_s2mm_aclk","m_axi_sg_aclk", "m_axis_mm2s_aclk", "s_axis_s2mm_aclk"; [email protected] { compatible = "xlnx,axi-dma-mm2s-channel"; interrupts = < 0 61 4 >; dma-channels = < 0x1 >; xlnx,datawidth = <0x20>; xlnx,device-id = <0x0>; } ; [email protected] { compatible = "xlnx,axi-dma-s2mm-channel"; dma-channels = < 0x1 >; xlnx,datawidth = <0x20>; xlnx,device-id = <0x0>; } ; } ; dmatest_0: [email protected] { compatible ="xlnx,axi-dma-test-1.00.a"; dmas = <&axi_vdma_0 0 &axi_vdma_0 1>; dma-names = "dma0", "dma1"; } ; any help in understanding the issue is appreciated.
  4. Hi, Sorry, this configuration is in our custom board which has zynq processor and we need to implement dma on this board. Its in design level and not yet started our development on custom board. I downloaded dma wrapper (zynq-xdma-master) from the link https://github.com/bmartini/zynq-xdma to test the dma transfer between ps and pl but it through below error when i try to compile with petalinux kernel - 4.9.0 version. CC [M] /home/Project/Petalinux_2016.4/zynq-xdma-master/dev/xdma.o /home/Project/Petalinux_2016.4/zynq-xdma-master/dev/xdma.c:21:35: fatal error: linux/amba/xilinx_dma.h: No such file or directory compilation terminated. Is there any stable Linux kernel released by diligent for ZYBO and tested with similar dma wrappers ? If so, can you please share the software.
  5. Hi, I am working with Diligent ZYbo and using petalinux 2016.4 . I have ddr of 1GB connected to PS and QDR connected to PL. I want to transfer data from PS to PL through DMA driver running on arm core(i.e PS) .I have searched lot of blogs but that explains only data transfer from PL to PS using sdk dma project but our requirement needs application to run on ps side performing dma b/w ps to pl and vise versa. Can anyone suggest sample application to configure dma and communicate b/w ps and pl.
  6. I apologize .I dint really mean to question in harsh way. Please don't mind. Yes , You are wright. our application doesn't have dependency to know the top or bottom sector. But we need to provide sector address mapping to our customer and i am confused of term top and bottom sector that is specified in the flash datasheet even though both have same start(0x0) and end address (00FFFFFF). I am using flash part S25FL128S and how to know whether it follow top or bottom sector. In our board, mtd1 refers to first partition and in which u-boot resides.We framed device tree with qspi structure like shown below and then we were able to detect mtd0,1,2,3 partition in /dev and successfully able to boot the images.But you have mentioned /dev/mtd11 references the first partition and there is no such like /mtd11 present in our dev entry. Is this specific to your board or in generic /mtd11 references first partition. Can you tell us whether the procedure we are following to create mtd partition is correct ? qspi: [email protected] { clock-names = "ref_clk", "pclk"; clocks = <&clkc 10>, <&clkc 43>; compatible = "xlnx,zynq-qspi-1.0"; status = "disabled"; interrupt-parent = <&intc>; interrupts = <0 19 4>; reg = <0xe000d000 0x1000>; #address-cells = <1>; #size-cells = <0>; [email protected] { compatible = "s25fl129p1"; reg = <0x0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <50000000>; #address-cells = <1>; #size-cells = <1>; [email protected] { label = "qspi-fsbl-uboot"; reg = <0x0 0x600000>; }; [email protected] { label = "qspi-linux"; reg = <0x600000 0x400000>; }; [email protected] { label = "qspi-device-tree"; reg = <0xa00000 0x20000>; }; [email protected] { label = "qspi-rootfs"; reg = <0xa30000 0x520000>; }; }; };
  7. hi @jpeyron , Have you found the sector type ( TOP or BOTTOM ) for QSPI memory map for our custom designed zynq board as i mentioned in my previous post ? Could you please provide me a solution..? Its kind of urgent... thank you, diya-
  8. Hi... I have successfully created mtd partitions and flashed images flashcp command and verified it successfully. QSPI part used in ZYBO kit is S25FL128S and am able to achieve mtd partition after adding compatible qspi type as "s25fl129p1" in device tree. In attached QSPI cypress datasheet they have mentioned address mapping with respective to Top and Bottom Sectors as below, S25FL128S Sector and Memory Address Map, Bottom 4-kbyte Sectors S25FL128S Sector and Memory Address Map, Top 4-kbyte Sectors S25FL128S Sector and Memory Address Map, Uniform 256-kbyte Sectors Could you please tell us which sector ( TOP or BOTTOM ) to select and on what basis we have to select sector type ..? This would help us to know memory map of our 32 MB QSPI flash in our custom design. I have attached the datasheet link here. http://www.cypress.com/file/177966/download (page 44 )
  9. Hai ., i had bought DIGILENT Zybo Kit 7000 series Family. i had flashed the Zynq boot image with the following offset values successfully on Zynq Board via Xilinx SDK (ver: 2016.4) fsbl.elf system_wrapper.bit U-boot.elf U-image 0x600000 dtb file 0xA00000 ramdisk 0xA20000 But the FPGA done_led is not working automatically after a power cycle. on the other hand, if i program the FPGA MANUALLY via Xilinx SDK , it works and kernel image loads successfully from QSPI Flash. How to Make FPGA done_LED works automatically? Thanks in Advance..
  10. Hai ., i had bought DIGILENT Zybo Kit 7000 series Family. i had flashed the Zynq boot image with the following offset values successfully on Zynq Board via Xilinx SDK (ver: 2016.4) fsbl.elf system_wrapper.bit U-boot.elf U-image 0x600000 dtb file 0xA00000 ramdisk 0xA20000 But the FPGA done_led is not working automatically after a power cycle. on the other hand, if i program the FPGA MANUALLY via Xilinx SDK , it works and kernel image loads successfully from QSPI Flash. How to Make FPGA done_LED works automatically? Thanks in Advance...
  11. Hi, Yes, http://www.wiki.xilinx.com/Build+and+Modify+a+Rootfs I downloaded ramdisk.gz from the above link and it has script "update_qspi.sh" which use flashcp to flash the kernel and file system image to qspi. flashcp -v $path/qspi-u-boot.bin /dev/mtd13 I am not familiar to what address does /dev/mtd13 denote and why images are specifically flashed at this /dev/mtd* entries. Can you please provide information about this /dev/mtd* mapping. Such that i can view the mapping and flash the kernel and file system at our desired address. Please find the script attached, update_qspi.sh
  12. Hi jpeyron, Am waiting for the input from your engineers.
  13. Hi, I have recently purchased ZYBO KIT and trying to re-program u-boot ,kernel, ramdisk image from kernel user space. I have gone through the below link and downloaded ramdisk image (arm_ramdisk.image.gz) http://www.wiki.xilinx.com/Build+and+Modify+a+Rootfs After extracting the arm_ramdisk.image.gz zip file, I found a script file (update_qspi.sh). Which program u-boot, Linux, and ramdisk image to QSPI flash. In this script file (update_qspi.sh) I found that, the below command is used to write the U-boot, Linux, Ramdisk image to QSPI flash flashcp -v $path/qspi-u-boot.bin /dev/mtd13 // for U-Boot image flashcp -v $path/qspi-u-boot.bin /dev/mtd15 // for Linux image flashcp -v $path/qspi-u-boot.bin /dev/mtd18 // for Ramdisk image I couldn't able to find the programmed location of images in qspi and also details about mtd 13,mtd15 and mtd18. I want to change the flash program address of Linux and ramdisk image. Do i need to create specific entry for u-boot, Linux and ramdisk image in user space. Can any one guide me on how to specify the flash address and program from user space.
  14. Hi, Please let me know whether i need to change or configure any parameter in u-boot to make it read and boot uImage. I am getting "wrong image format " message during sd boot With Your images, sd and qspi boot works fine . I built the kernel uImage using below command, petalnux-package --image -c kernel --format uImage.