lekgolo167

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  1. Thanks JColvin for the help, and for anyone else reading this forum, I found these videos on xilinx's website that helps explain the spartan 7 and the other 7 series families. Video about the spartan 7 overview https://www.xilinx.com/video/fpga/spartan-7-technical-overview.html video about the spatan 6/ atrtix 7/ spartan 7/ and zynq 7 comparison https://www.xilinx.com/video/fpga/cost-optimized-fpga-soc-portfolio.html
  2. - Tickstart yes, on windows 10.
  3. I think that fixed it. In the sources window I clicked the IP Sources tab and right clicked the module and I think i selected update IP or generate IP and it seems to be running properly on the board.
  4. that's what I thought but don't the projects on here come with all the files need? there is a xadc_wiz_0.xci file found in master/src/ip/xadca_wiz is that the right file or does it need to be a .v file like the top module? while the top module is found in master/src/hdl in the entire master folder thats the only file with xadc_wiz_0 so is it missing then? or is it supposed to import it from a library?
  5. I guess im looking at a different page on the digilent web site. here's a screen shot one says 128Mbit and the other 128MB which i guess should say 16MB. Thanks for the link and keeping me posted!
  6. I'm getting these errors when trying to run synthesis a demo project from the arty resource page. On that page I tired doing the XADC. i did get it to generate the .tlc file stuff to make the project I did download the board files for the arty and placed them in the boards_files directory. but maybe it's not implemented correctly or im missing something. Some xilinx forums said to click on the "open block design" to fix this but mine is grayed out and I can't select it. Most tutorials online show the old Vivado UI the 2017.1 seems to be slightly different. mostly likely due to the missing xadc_wiz_0 module but it shows up on the source list. Or maybe its a compatibility issue between Vivado 2016.4 and 2017.4 I'll wait for a response before trying something else.
  7. The arty comes with a one year Vivado Design Edition, when that subscription ends and I'm forced to switch to the Vivado Web Pack Edition, what features/tools will I lose? Also, will it greatly impact my ability to design stuff (on a hobbyist/learning level) or would I hardly notice they are gone? I think the C code is only included in the one year license, correct?
  8. Okay, thanks i'll have to keep an eye on that thread. One thing I noticed on the product page for the arty-S7 is in the diagram it shows 16Mbit spi flash and in the list of specs it says 16 MB which is a big difference. Is it an error or am I mistaken? Also, what are the major differences, applications, or prons and cons of the artix vs spartan families in general then? or in other words what is each family geared towards?
  9. I made a order with a FPGA board and some pmods and the shipping was about 20 bucks, later down the road if i decided to buy more Pmods for my board, will I still be charged 20 for shipping even if i order only 10 bucks worth of Pmods? I did a checkout without confirming and it still wanted to charge me 20+ bucks for shipping. if that's correct i'd have to save up a lot more and buy a big bundle of Pmods to justify the cost of shipping seeing that it's the same for 1 Pmod or 10 Pmods. correct me if im wrong.
  10. I recently finished a digital circuits class and we used the Basys 2 board with the spartan E3. I enjoyed the class a lot and decided to buy a FPGA board, I got the Arty with the Atrtix-7 chip. After doing so,I saw a video of the new Arty releasing this summer with a spartan-7 chip. That made me wonder what is the difference between the two? If someone could explain the differences; like Pros and Cons of the two, and applications for both, as well as the technical differences or specifications, that would be awesome!