RichardV

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  1. Hello. I have a quick question, I am looking for the exact schematic for the "Digilent Spartan-3an Board". The Digilent part number is: PB210-112. I have the Revision D board, but I'd be happy to get anything "-3AN". The -3A board schematic is close, but there are many reference designator differences that make it difficult to follow the design and actual board. I've scoured the internet, but couldn't find this particular schematic. Can anyone help me locate it? Thank you, Richard V
  2. Hello again. I got my JTAG-HS1 programmer today (Limited Time, $40 + shipping). I had a few setbacks, overcame them and would like to share. This lengthy post is just FYI for anyone interested in resurrecting a Spartan-3 (3A, 3AN, 3E) board. I no longer need support on the subject of this post, but I am thankful to Dan and Zygot for helping me get to this point. Sorry, but I can't help with the "Spartan-3 DSP"; I avoided it since I don't have one. I didn't understand Zygot's previous discussion on bending out the pins to make the JTAG HS1 connector fit. Now I get it (image). The pins are are a double-row, 0.1" spacing between rows and pins. The row for the TMS JTAG is too close the the SPI JTAG pins, so the programmer doesn't fit easily. Just like Zygot said, one just has to bend the pins outward, or extend them with an adapter. I got lazy as you can see here. I could not use ISE 8.2 because it doesn't support the Spartan-3AN (does support the -3A and -3E). The Adept tool saw the ID CODE difference between the -3A and -3AN and couldn't proceed. So I had to go back to using "Plan Ahead". I think "Plan Ahead" is the right tool, but it had the same problem as ISE. It (xst.exe) kept crashing on my Windows 10 System. I think "XST" is the synthesizer tool because that's when this error would occur (attached image). I found the solution here at: https://www.xilinx.com/support/answers/62380.html. As it turns out, one doesn't need Adept since Impact works okay. Adept seems to work too, though. I know this fix works with "Plan Ahead", but I don't yet know if it will fix that issue I had using ISE directly. It seems that Plan Ahead is a shell program for launching ISE. Can anyone explain the connection between Plan-Ahead and ISE? If I still find a problem using ISE directly, I will make one more post to this thread. So my Plan Ahead project works just great with Impact. I got this very simple code to synthesize and program this board; it runs. This Spartan-3AN Demo Board is alive again! If you see one in the trash or eBay, grab it for low cost and you will have a good VHDL learning platform. ISE 14.7 seems to work with this older board. Don't waste your time with the old version of ISE 8.2 if you have the -3AN board; you will reach a dead end. Besides, version 14.7 works way nicer than the older version. Why Use Throwback Tools? If you want to use the latest tools and FPGA, I was previously using the Digilent CMOD-A7 (Xilinx Artix-7 FPGA with built-in programmer: $75-$89 at Digikey). I was using Xilinx Vivado (with SDK) to design and program it. You can actually get away without using VHDL coding using Vivado, but this defeated my purpose (to learn pure VHDL). This is why I temporarily stepped back to this older Spartan-3 board. Once I re-learn VHDL, My Goal: I want to write my own "IP" block in VHDL an integrate it into Vivado. I'll do this later when I feel comfortable with VHDL again. Sometimes one has to step back to move forward. Xilinx SDK is a software development kit to program your "C-Language" code into the "MicroBlaze" soft-core processor. You can do a lot of powerful things just using the free Webpack license for Vivado. I liked version 16.2, but it's the older version now. Thank you, Richard V
  3. Hello again, I found the HS1 cable zygot mentioned. It's available for a "limited time", so I just jumped on it. I'm going to give this a try. It was a little lower cost than the HS2, but I don't know if it was worth it. I think the HS2 might be capable of supporting more devices. I will update this thread to show my success or failure after I get it. Best Regards, Richard V HS1 link http://store.digilentinc.com/jtag-hs1-programming-cable-limited-time-see-jtag-hs3/
  4. Thank you both Dan and zygot. You've given me gold. This is some really great information. However, I could not find the JTAG-HS1 zygot mentioned. I found the JTAG-HS2 at the Digilent store: :http://store.digilentinc.com/jtag-hs2-programming-cable/ . I just reviewed the schematic for the 3A board. The VCC is connected to 3.3 volts. The HS2 programmer works with 1.5 to 5 volts. Does anyone think me buying this HS2 is a mistake for my purpose? My concern is if the driver supports the 3A and 3E boards. I'm not sure if it matters. Spartan-3AN Schematic: https://www.xilinx.com/support/documentation/boards_and_kits/s3astarter_schematic.pdf Dan, you were right about Adept. I accidentally picked the Linux version (my PC is 64 bit). I see the Windows version too now. Again, thank you all for your support. Best regards, Richard V
  5. Hello Dan. I found a lot of information (links below), but the only programming information that I can find uses the "JTAG" port, which means I would have to buy a $60 dongle for an old, outdated board that I just want to learn with. I also don't know if these newer dongles will work with this old board. The board apparently has an on-board dongle for programming, but I can't find information on it. I would appreciate any information. My board is P/N: HW-SPAR3AN-SK-UNI-G-(SPARTAN-3A). I also have a Spartan-3E boards, which is nearly the same, but has different pinouts. If the 3E boards is easier to use, then I'd use that one. I just noticed that Vivado HLS supports the Spartan 3A board. I tried using it just a few a while ago. I was able to synthesize a simple project. However, I don't know if I can use Vivado HLS to program this board though. Is using Vivado HLS a waste of time for me (using the Spartan 3)? Thank you, Richard V Links: https://www.xilinx.com/support/documentation/boards_and_kits/s3astarter_schematic.pdf https://www.xilinx.com/support/documentation/boards_and_kits/ug330.pdf https://www.xilinx.com/products/boards-and-kits/hw-spar3an-sk-uni-g.html https://reference.digilentinc.com/_media/spartan-3/s3board_rm.pdf
  6. Hello. I picked up this Spartan-3AN development board to follow along this good book: "FPGA Prototyping by VHDL Examples", Xilinx Spartan -3 Version, by Phong P. Chu. The book appears to be published by Wiley-Interscience. It's a very good book to learn VHDL with. Dr. Chu recommended using ISE version 8.2 and Modelsim XE III. I tried using the latest ISE version (14.7), but it kept crashing. What I would like to ask is, can you recommend a tool-chain that is still available, and is compatible with the Spartan 3 series boards? I am able to synthesize a project using ISE 8.2, but I can't program it with the IMPACT tool, per the book. The book describes how to perform the programming process using a "boundary scan" via the JTAG interface. I do not have the JTAG dongle, so I'm tyring to use the on-board USB programmer, but I can't find any information on how to use it. I saw one post mentioning a tool called "Adept", so I tried downloading it. It requires a "bash" tool to install it, so I gave on that. I would spend more time on it if I knew what is the correct tool-chain to use, given that this is an old outdated board with little support. Should I try to get the latest version of ISE working, or find the programming software to use that USB programmer? Another approach would be to buy a dongle, but I'm not sure which one to get. My JTAG interface is 2x6 pins. It looks like the same set of pins on each row, so I don't know if 1x6 interface will work. Digilent has 2 USB dongles, one is 14 pins (Jtag 2), and the other is 6 (Jtag 3). Each one is about $60, so I didn't want to just guess by buying that 1x6 (Jtag 3) programming dongle. It seems to me that the Type B USB cable connector was made for programming, but I don't know what software it will work with. The IMPACT tool keeps crashing when I try to communicate with my board. I can do synthesis and generate the bit file, but I can't program it. I also can't run the debugger. Could someone please make a suggestion to help extend the life of these excellent Spartan-3 boards? Thank you, Richard V
  7. Hello again. I tried something different. I wanted to focus on that example that is imported, as I originally started. I fixed my block diagram, but did something different because I'm not using the PMOD IP. I added an input port vector [0:0], configured as an interrupt. I also added this line for the interrupt pin in my constraint file: set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { Interrupt_1[0] }]; #IRQ This is my interrupt pin. I also set it up to interrupt on the falling edge. The Bitstream generated with no problems. Moving into SDK. I imported the example "xspi_intr_example". I still got errors, but I was able to fix them with BOGUS data. I don't know what the real values should be. I have included the file, but here are the two lines and the locations: Location in code: First line after Constant Definitions #define XPAR_INTC_0_SPI_0_VEC_ID 1 // RRV: I forced this. Location in code: First line in main() XIntc IntcInstance; // RRV: I forced this I added these lines manually to make this code compile. I see that I'm missing an IntC. Interrupt_Pin.pdf xspi_intr_example.c
  8. Hello Jon. This is excellent! I just have one question regarding the block diagram: I see this Concat IP connects to the SPI interrupt. I presume "Concat" mean concatenate. If correct, I can see why it is needed for multiple interrupts. However, why is it needed for a single interrupt, like you have shown? Thank you Jon.
  9. Hello. I am trying to use one of the imported examples (xspi_intr_example.c) from within SDK (found link in system.mss in SDK). I want to use this "interrupt" example (I presume "intr" means "interrupt") to figure out how to use interrupts with MicroBlaze and SDK. No Interrupt Port Externals When I imported it, I got a compiler error regarding a missing header file: #include "xscugic.h". I found a copy of this file, and others linked to it (.c and .h files). Multiple copies with different versions are shown. I don't know which one to pick so I chose the set of files with the highest revision value shown. However, when I manually enter this file it created more errors regarding missing files and undefined constants. I tried manually adding them in, but they created more of this problem. It seems to me that I'm doing this incorrectly. This code was automatically generated, so I believe it messed up because my older Bitstream didn't have an "Interrupt" port setup (hence No Interrupt Port). I believe that we should never have to manually add these driver files; is this correct? Added Interrupt Port Externals So now I've I added "external" ports to the Interrupt signals on the MicroBlaze, but I honestly don't know what I'm doing here (please see attached). It validates ok, so I tried to generate a bitstream, but it failed. Below are the first 2 error messages. I do not understand the fine details of these messages, but it appears related to these Interrupt port externals that I just added. The error message indicates to alter the contents of a "tcl" file, which I find difficult without proper documentation showing how. This design synthesized fine before these editions, so this error is limited to the interrupt pin I want to add. Constraint File I do not have the interrupt pin setup in my constraint file, so I think this is part of the problem (possibly the cause of the problem itself). Can someone shown me a sample Constraint file for an interrupt pin? Interrupt Setup Example/Instructions in Vivado Could someone please point out how to setup an interrupt within Vivado so that I can get this "xspi_intr_example.c" code working? I am not sure what Vivado wants to make the Interrupt work. Thank you, Richard V Vivado Error messages (with Interrupt ports as shown in PDF): ERROR: [DRC 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 3 out of 52 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: Interrupt_Ack_1[0:1], Interrupt_1. ERROR: [DRC 23-20] Rule violation (UCIO-1) Unconstrained Logical Port - 3 out of 52 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: Interrupt_Ack_1[0:1], Interrupt_1. design_spi_oled.pdf
  10. Hello Natsu. I agree that it's not a good idea to big-bang the SPI port. I'm just trying to set the initial conditions. I plan on using regular SPI commands afterwards. I'm mostly trying to verify if I'm actually writing to an SPI port. This is my first time using a SPI device. I'm new to Vivado and SDK, but I have worked with microcontrollers in the past. It's a bit harder with an FPGA and MicroBlaze, but I know the challenge is worth it. Thank you, Richard V
  11. Hello, I am trying to avoid all of those SPI commands with higher level abstractions. The low-level example seems to help, but it is incomplete. It doesn't show how to setup or toggle the slave select lines. I presume this is done automatically, but I want manual control. I cannot find information on MicroBlaze registers. For example, let's look at XSpi_SetSlaveSelect. This is all I could find: file:///C:/Xilinx/SDK/2016.2/data/embeddedsw/XilinxProcessorIPLib/drivers/spi_v4_2/doc/html/api/group__spi__v4__1.html#ga162523a3e9b29f063701db303ac8cf17 . It's not very clear, or correct. Let me explain. I only have one slave: here is my constraint file for the SPI signals: set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { spi_0_ss_io[0] }]; #CS #IO_L5N_T0_D07_14 Sch=ja[1] set_property -dict { PACKAGE_PIN G19 IOSTANDARD LVCMOS33 } [get_ports { spi_0_io0_io }]; #MOSI #IO_L4N_T0_D05_14 Sch=ja[2] set_property -dict { PACKAGE_PIN N18 IOSTANDARD LVCMOS33 } [get_ports { spi_0_io1_io }]; #MISO #IO_L9P_T1_DQS_14 Sch=ja[3] set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports { spi_0_sck_io }]; #SCK #IO_L8P_T1_D11_14 Sch=ja[4] I am using the CMOD-A7 module.These are pins on the PMOD connector. My slave select is on JA-1, as you can see. Let me demonstrate with a code snippet: while(1) { XSpi_SetSlaveSelect ( XPAR_SPI_0_BASEADDR, (u32)0x01); // This should have set my SS[0] pin to 1. It doesn't. wait a time delay XSpi_SetSlaveSelect ( XPAR_SPI_0_BASEADDR, (u32)0x00); // This should have set my SS[0] pin to 0. It's always 0, so I don't know if this worked or not. wait a time delay } This should just toggle the pin, but it doesn't. Can someone please provide a simple SPI example that is only 1 level deep (in file hierarchy)? Please include example that sets up the SPI to use the correct slave pin, and then toggles it. I included my main project file. This was originally from the Polled SPI example project, "xspi_polled_example.c", so everything else was generated by SDK. If you create a basic project with an SPI port, then you can just replace the contents of that file with that of this file and it will compile. Thank you, Richard V Temp.c
  12. Hello again Jon. I have narrowed down the problem to 1 line of code. Data = XGpio_DiscreteRead(&Gpio, LED_CHANNEL); // Read does work here //Data = XGpio_DiscreteRead(&Gpio, PMOD_CHANNEL); // Read doesn't work here The top line works. I can read back the register that sets the LED_CHANNEL. However, the line below does not work. I cannot read back the value of PMOD_CHANNEL. I have watched this in the debugger window with a watch on the Data variable. The second line always returns 0, no matter what the real state of PMOD_CHANNEL is. Writing to PMOD_CHANNEL does work as an output. I can see the correct LED change. I tried changing using the automated connection and it came up with port gpio_rtl. I turned off the box for "all outputs" on GPIO2. I also tried using the "tristate" before doing this. I also changed my XDC file in response to the errors that first showed up. I get a good bitstream and it runs just as well. I have added a debug window where I added duplicated instances of the Data variable and gpio driver. The output works fine, but again Data2 just never updates. Why is only 1 variable shown in Yellow? I think this is an important clue since I can't read anything into Data2. This readback of GPIO2 (channel 2) is the only issue I am having, Could you please help me debug this 1 line of code? Thank you, Richard gpio_design_spi_oled.pdf
  13. Hello again Jon. I installed my board file, updated the files and got it to generate a bitstream. However, I cannot open SDK. here is the message (attached). I went into Explorer and set the properties of the directory and all sub-directories to uncheck that "Read Only" box. However, Vivado keeps making it "Read Only" and I can't do anything about it. SDK will not open this project. Can you please tell me why? Thank you, Richard V
  14. Thank you Jon, but I can't open this project with 2016.2 or the latest 2017.4. Below you can see the problem I get with 2017.4. I do not have the "IP" that this code wants, so I can't see the block diagram at all this time. Version 2016.2 indicates that the blocks are from a "future version". Version 2017.4 doesn't recognize the board you're using. Do I really have to load EVERY single example board into Vivado just to get these examples working? Thank you, Richard
  15. Hello. Thank you Arthur. Yes, I get that now. I'm downloading the latest version of Vivado and trying again. Back to my main problem though: I have new information. I did some debugging and I found that this "XGpio_DiscreteRead" function isn't returning the correct value. Please see my posted code. Here are two lines that do the same thing. One works, and the other does not: Data = XGpio_DiscreteRead(&Gpio, LED_CHANNEL); // This line does work. //Data = XGpio_DiscreteRead(&Gpio, PMOD_CHANNEL); // This line doesn't work! Always "0" As you see I commented out the line that doesn't work. I keep getting a "00000000" value even though this is just a register that it is reading back. Here is the whole loop just to provide some context: while (1) { Data = XGpio_DiscreteRead(&Gpio, LED_CHANNEL); // This line does work. //Data = XGpio_DiscreteRead(&Gpio, PMOD_CHANNEL); // This line doesn't work! if (Data & LED) { XGpio_DiscreteWrite(&Gpio, LED_CHANNEL, Data & ~LED); XGpio_DiscreteWrite(&Gpio, PMOD_CHANNEL, Data & ~RST_LED); } else { XGpio_DiscreteWrite(&Gpio, LED_CHANNEL, Data | LED); XGpio_DiscreteWrite(&Gpio, PMOD_CHANNEL, Data | RST_LED); } for (Delay = 0; Delay < LED_DELAY; Delay++); // Wait a small amount of time so the LED is visible } This code works to make both LEDs blink together. When I use the line that does not work both LEDs do nothing (always on). The variable "Data" is always set to 0. Since this is just reading back a register, I have no clue as to how to fix this. Can anyone tell me what I did wrong? Thank you, Richard V
  16. Hello Jon. Respectfully, this is the first GPIO example that I became frustrated with and abandoned. It does not generate a bitstream as is. Attached is the message. I tried creating a wrapper for the "top module", but the program is "locked" and won't let me. In any case, it doesn't work "as is". I'm using version 2016.2 too. I don't know if using this older version is part of the problem. Okay, skipping Vivado, I opened SDK, but no project file was located. At first I thought creating the Vivado Project emptied the SDK of the project, but I started all over from the zip file again. There is no SDK code to look at. The biggest problem of all is that this design does not use a constraint file to route the LEDs. I don't want to drive just the LEDS; I also want to drive ANY general purpose GPIO pin (like on the PMOD connector). I see the "ports" are used to do this routing, which is what I want to avoid. Attached is my block diagram, and my source code. I merged the polled SPI example with a GPIO example and it kind of works. I have multiple LEDS. Two are the built in LEDs that you will see connected through a port (even though I want to avoid this, I can't). You will see some other pins on that port. I'm trying to use one of them to drive an LED. The problem is that I can't drive both the PMOD LED and the on-board LED at the same time. The PMOD is on Channel 2, and the built in wants to be on Channel 1. You can also see that I have attached my constraint file to help explain what I am trying to do. Would you please take a look at this from the point of view of someone trying to drive the LEDS a general purpose IO bits using a constraint file to route signals? Thank you, Richard V modified_xspi_polled_example.c design_spi_oled.pdf cmoda7_oled.xdc
  17. Hello, I created a block diagram that has a axi_gpio_0 block, as you can see in my image. Below is most of my constraint file. My diagram synthesizes, implements and generates a bitstream. I was able to get into SDK with no problems. I am stuck in SDK now. Goal: I am just trying to blink an LED (gpio_io_o[4]) using one of the the example code projects shown in system.mss file. I chose the "xgpio_example.c"; first on the list. The example code has these lines: #define LED 0x01 and #define LED_CHANNEL 1. This code should just simply blink an LED. I am not sure if LED_CHANNEL is channel "1", or what "LED_CHANNEL" means in the code. Using these original settings my LED did not blink or light up at all. Looking at my constraint file, you will see that I am using gpio_io_o[4] and gpio_io_o[5] for my LEDs, so I changed the first line to #define LED 0x04. This had no effect. I tried everything I could think of. For example, I tried making a change like this: #define LED_CHANNEL 4, but this had no effect. I tried many combinations of things. Using the oscilloscope, I looked at all of the pins on the PMOD connector, but nothing is active. I'm sure I programmed the FPGA and code correctly since the processes went smoothly. I'm trying to avoid using any IP blocks other than the built in axi_gpio blocks. Those IP blocks from example code do not TEACH us anything and are rather useless in that regard. I've looked all over, but cannot find a working version of "BLINKY" code (which is fairly standard in MCU and Microprocessor examples). Can someone please point out a decent GPIO tutorial that actually works? Here is a sample of the code: XGpio_SetDataDirection(&Gpio, LED_CHANNEL, ~LED); The "LED_CHANNEL" AND ~LED parameters are confusing. Why is LED inverted? For example, if LED = 0x01, then ~LED = 0xfffffffe. Why? Thank you, Richard V My constraint file: # LEDs set_property -dict { PACKAGE_PIN A17 IOSTANDARD LVCMOS33 } [get_ports { gpio_io_o[4] }]; #led[0] }]; #IO_L12N_T1_MRCC_16 Sch=led[1] set_property -dict { PACKAGE_PIN C16 IOSTANDARD LVCMOS33 } [get_ports { gpio_io_o[5] }]; #led[1] }]; #IO_L13P_T2_MRCC_16 Sch=led[2] Here are my other GPIO bits: #OLED set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { spi_0_ss_io[0] }]; #CS #IO_L5N_T0_D07_14 Sch=ja[1] set_property -dict { PACKAGE_PIN G19 IOSTANDARD LVCMOS33 } [get_ports { spi_0_io0_io }]; #MOSI #IO_L4N_T0_D05_14 Sch=ja[2] set_property -dict { PACKAGE_PIN N18 IOSTANDARD LVCMOS33 } [get_ports { spi_0_io1_io }]; #MISO #IO_L9P_T1_DQS_14 Sch=ja[3] set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports { spi_0_sck_io }]; #SCK #IO_L8P_T1_D11_14 Sch=ja[4] set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { gpio_io_o[0] }]; #DC #IO_L5P_T0_D06_14 Sch=ja[7] set_property -dict { PACKAGE_PIN H19 IOSTANDARD LVCMOS33 } [get_ports { gpio_io_o[1] }]; #RES #IO_L4P_T0_D04_14 Sch=ja[8] set_property -dict { PACKAGE_PIN J19 IOSTANDARD LVCMOS33 } [get_ports { gpio_io_o[2] }]; #VBAT #IO_L6N_T0_D08_VREF_14 Sch=ja[9] set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { gpio_io_o[3] }]; #VDDC #IO_L8N_T1_D12_14 Sch=ja[10] This is an excerpt from the example code and was generated by SDK: #include "xparameters.h" #include "xgpio.h" /************************** Constant Definitions *****************************/ #define LED 0x01 /* Assumes bit 0 of GPIO is connected to an LED */ /* The following constants map to the XPAR parameters created in the * xparameters.h file. They are defined here such that a user can easily * change all the needed parameters in one place. */ #define GPIO_EXAMPLE_DEVICE_ID XPAR_GPIO_0_DEVICE_ID /* * The following constant is used to wait after an LED is turned on to make * sure that it is visible to the human eye. This constant might need to be * tuned for faster or slower processor speeds. */ #define LED_DELAY 1000000 /* * The following constant is used to determine which channel of the GPIO is * used for the LED if there are 2 channels supported. */ #define LED_CHANNEL 1 /**************************** Type Definitions *******************************/ * The purpose of this function is to illustrate how to use the GPIO * driver to turn on and off an LED.* * @param None ** @return XST_FAILURE to indicate that the GPIO Initialization had * failed. ** @note This function will not return if the test is running. * ******************************************************************************/ int main(void) { u32 Data; int Status; volatile int Delay; /* Initialize the GPIO driver */ Status = XGpio_Initialize(&Gpio, GPIO_EXAMPLE_DEVICE_ID); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* Set the direction for all signals as inputs except the LED output */ XGpio_SetDataDirection(&Gpio, LED_CHANNEL, ~LED); design_spi_oled.pdf
  18. Hello Jon. I got that PmodOLED_v1_0 example working using the IP provided in the "vivado-library-master" library file. I have an OLDED module, so I was able to verify it works just looking at the demo run. I have a bigger problem though; I need to avoid using those IP blocks. I see your PmodSF3 example does a similar thing in using an IP block. Now this "IP" itself is the problem. It's not truly a good example to follow if one wants to use the AXI_QUAD_SPI block. There is a coding concept called "data hiding" that IP blocks seem to employ, which is exactly why I can't use them. I cannot use "Intellectual Property" code for my final product. I looked at the block diagram settings for them, but I cannot access the lowest level of this block diagram design. It does not use the standard constraint file that I can view, and it doesn't show how to use the SPI port with SDK (where are are MOSI, MISO, SCLK and CS defined in the code?). So I am back where I started trying to get that AXI_QUAD_SPI block to work with an external SPI device, but NOT using an IP block. I believe that it must be possible. Please direct me to the literature that I need to read to accomplish this? Thank you, Richard V
  19. Hello again Jon. I am trying to follow along with the PmodSF3 example. Unfortunately my block does not validate because I have all of these port input pins left open (warnings). I cannot synthesize my design, even though the Validate function show only warnings. There is no example explaining what ports need to be connected. When I dropped in an AXI_QUAD_SPI block the Automated Connection created an SPI port for me. The PmodSF3 block did not do this. What I don't understand is how am I supposed to create an SPI port with MOSI, MISO, SCLK and CS signals? I know how to enter these arbitrary names into a constraint file, but I don't understand how to make these Pmod pins take over that function. Another problem arises when I can finally get into SDK. I don't know what KEYWORDS to use to make the connections between those constraint file names and what SDK is expecting. Is there a tutorial showing how to connect an SPI port from start to finish? I have worked with SPI ports for many years with Microcontrollers, so this FPGA IP approach is totally new to me. Is there an Primer I can follow? Thank you, Richard V
  20. Thank you Jon. This is very helpful. I found that one has to click that "Code" tab or the "Download/Clone" option won't show up. Regards, Richard V
  21. Hello one last time on this subject Jon. I just visited the repository with that SF3 example. The whole project is in pieces. I see multiple version of constraint files, and I don't see a Vivado project anywhere. I don't understand how to use this repository too. It's not like Github. What does "Pull" mean? How do I download a project as a complete entity that I don't have to reconstruct? I visited that repository "Boot Camp", but it also isn't very clear. Can you offer some suggestions on how to get started with this complicated tool (Vivado & SDK)? Thank you, Richard V
  22. Hello again Jon. Thank you for this information, and all of your help. I also realized that the Flash Memory is a Quad SPI, so it's not compatible with the settings for my standard SPI devices. Yes, I realize that tapping into those SPI lines on IC3 was going to be difficult. Thank you for pointing out the PMOD port, which is accessible. Thank you for that SF3 example too! This is a big help. Best regards, Richard V
  23. Hello. I was able to follow the example "How To Store Your SDK Project in SPI Flash". My new problem is that I want to drive a second SPI device using that QSPI port. Should I share that existing QSPI port with my new external slave device, or implement another AXI_Quad_SPI block? Now I'm forced to ask, how does Vivado (or SDK) know where the MISO, MOSI, SCLK and Slave Select lines are for the memory device? Vivado generated an XDC file with only one line ("set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]"), yet it works just fine to download from the external flash memory (CMod-A7 board). There must be another file that has this board information. I'm calling this an "invisible constraint file". Do I use the actual constraint file to set my SPI port pin assignments for my second port? If so, wouldn't that "invisible constraint file" interfere? If recommended to use 1 SPI port to drive the 2 slaves, then how do I implement the Slave Select signals? Are there any SPI examples with multiple slaves to demonstrate this? Thank you, Richard V
  24. Hello Jon. Thank you for your response. Unfortunately I was unable to open your file. I'm using version 2016.2, and the one you used is newer. I could not look at your block diagram. I followed your advice and got it to work. The biggest mistake I made: Cache was 8Kb. You recommended 16Kb and this makes all the difference. When using 8Kb, my data baud rate and format were bad. Just a note that isn't clear in step 2.3. I chose the option "axi_emc_0_S_AXI_MEM0_BASEADDR" and this works. Any other option and one will get nothing on the UART (non-operational). You mentioned that you made a correction regarding the offset value if "not using" compression. I used that value shown for the CMod-A7 (0x00300000) and it worked just fine. What other values should we use? I presume it depends on the size of "download.bit". Please offer your thoughts. Thank you for your help. Sincerely, Richard V
  25. Hello, I am trying to follow this example: "How To Store Your SDK Project in SPI Flash", found on this website (https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start). I am also following the "Getting Started" example (found at: https://reference.digilentinc.com/learn/programmable-logic/tutorials/cmod-a7-getting-started-with-microblaze/start ) to create a "Hello World" example. I've gone through this example several times now and I cannot get it to work. The devices programs per the instructions without errors, but my code does not run. Attached is my block diagram. I couldn't find an example showing how to connect the AXI QSPI block, but the Validation shows no errors. Step 2.3) is confusing. There is nothing to explain what that "mig_7series_0" is. I also attached an image of what my "Generate linker script" page looks like. I made one of the settings different to show the alternate choice available. I don't know which one to use. The CMOD A7 does not have "DDR" memory, so I don't know what to do here. Can anyone help me spot what I am doing wrong here? Which memory option should I use: microblaze_0_local_memory_ilmb_bram_if_cntlr_microblaze_0_local_memory_dlmb_bram_if_cntlr or axi_emc_0_S_AXI_MEM0_BASEADDR ? Thank you, Richard V