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About RichardV

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  1. Hello, I need the help of a Digilent Engineer with CMod-A7 experience (Artix 7). I'm trying to find out if it's even POSSIBLE to run an SDK application from bootup on the CMod-A7. I'm able to load the HDL code, but NOT the SDK application I really need. I'm starting to doubt it's even possible to do this. Someone please just tell me Yes/No if this is true or not? I tried following this tutorial using another Arix 7 device: The problem with this tutorial is that the CMod-A7 doen'st have memory config
  2. Hello Byteman. Yes, I'd like to perfect this tutorial for the Cmod-A7: I think my HDL code is loading, but I can't get it to run my SDK application code to load from bootup. I'd very much like to work with you. What's a good way to give you my information without making it public? Best regards, Richard V
  3. Hello. I have seen the Cmod A7 tutorial that stores the .bit file to QSPI for boot from powerup, but this doesn't store an application program like "Hello World". It's actually a 2 stage process for the Zynq; one needs a First Stage Bootloader (FSBL) and a Second Stage Bootloader finishes the job. But I'm using the Microblaze on the Cmod A7 and this process is not so easy. I've tried using a tutorial using for another Artix 7 device (Nexsys, link below), but I failed when trying to adapt it to the Cmod A7. If anyone has a suggestion, I'd be grateful for the advice. Thank you,
  4. Hello artvvb. Thank you for code, but I can't even generate a bitstream yet. Attached is my block diagram (without the GPIO signals for controlling the OLED). Did I do a simple error here? I keep getting weird errors even though I'm letting Vivado do the automated connecting. The messages are confusing and long (image below). All I want to is drive the PMOD OLED as a simple SPI port device. I managed to set the QSPI to Standard mode, Master, with FIFO enable (tried without FIFO too), but it still doesn't work. I cannot find a simple SPI example anywhere at Digilent that works with
  5. Hello artvvb. Thank you for your response. I'm sorry if used the terms incorrectly. I meant that the Microblaze supports QSPI devices, but I only want to drive a simple SPI device, like an OLED or a temperature sensor. From what I recall, QSPI uses 4 lines for each of the MISO and MOSI signals. It looks like you answered my question, the QSPI can be configured to run in "standard mode". It's unfortunate, though, that every example of the QSPI port uses all 4 lines to read a flash memory. I have sample projects for the OLED that use the ordinary SPI port, but it's for the Zynq.
  6. Hello, I want to use the Cmod-A7 for a project, but it uses the Microblaze processor and only supports QSPI, from what I can tell. Is it possible to configure the QSPI port to use only part of its resources to drive a regular (legacy) SPI port? Thank you, Richard V
  7. Hello. I have a quick question, I am looking for the exact schematic for the "Digilent Spartan-3an Board". The Digilent part number is: PB210-112. I have the Revision D board, but I'd be happy to get anything "-3AN". The -3A board schematic is close, but there are many reference designator differences that make it difficult to follow the design and actual board. I've scoured the internet, but couldn't find this particular schematic. Can anyone help me locate it? Thank you, Richard V
  8. Hello again. I got my JTAG-HS1 programmer today (Limited Time, $40 + shipping). I had a few setbacks, overcame them and would like to share. This lengthy post is just FYI for anyone interested in resurrecting a Spartan-3 (3A, 3AN, 3E) board. I no longer need support on the subject of this post, but I am thankful to Dan and Zygot for helping me get to this point. Sorry, but I can't help with the "Spartan-3 DSP"; I avoided it since I don't have one. I didn't understand Zygot's previous discussion on bending out the pins to make the JTAG HS1 connector fit. Now I get it (image). T
  9. Hello again, I found the HS1 cable zygot mentioned. It's available for a "limited time", so I just jumped on it. I'm going to give this a try. It was a little lower cost than the HS2, but I don't know if it was worth it. I think the HS2 might be capable of supporting more devices. I will update this thread to show my success or failure after I get it. Best Regards, Richard V HS1 link
  10. Thank you both Dan and zygot. You've given me gold. This is some really great information. However, I could not find the JTAG-HS1 zygot mentioned. I found the JTAG-HS2 at the Digilent store: : . I just reviewed the schematic for the 3A board. The VCC is connected to 3.3 volts. The HS2 programmer works with 1.5 to 5 volts. Does anyone think me buying this HS2 is a mistake for my purpose? My concern is if the driver supports the 3A and 3E boards. I'm not sure if it matters. Spartan-3AN Schematic:
  11. Hello Dan. I found a lot of information (links below), but the only programming information that I can find uses the "JTAG" port, which means I would have to buy a $60 dongle for an old, outdated board that I just want to learn with. I also don't know if these newer dongles will work with this old board. The board apparently has an on-board dongle for programming, but I can't find information on it. I would appreciate any information. My board is P/N: HW-SPAR3AN-SK-UNI-G-(SPARTAN-3A). I also have a Spartan-3E boards, which is nearly the same, but has different pinouts. If the 3E boar
  12. Hello. I picked up this Spartan-3AN development board to follow along this good book: "FPGA Prototyping by VHDL Examples", Xilinx Spartan -3 Version, by Phong P. Chu. The book appears to be published by Wiley-Interscience. It's a very good book to learn VHDL with. Dr. Chu recommended using ISE version 8.2 and Modelsim XE III. I tried using the latest ISE version (14.7), but it kept crashing. What I would like to ask is, can you recommend a tool-chain that is still available, and is compatible with the Spartan 3 series boards? I am able to synthesize a project using ISE 8.2, but I c
  13. Hello again. I tried something different. I wanted to focus on that example that is imported, as I originally started. I fixed my block diagram, but did something different because I'm not using the PMOD IP. I added an input port vector [0:0], configured as an interrupt. I also added this line for the interrupt pin in my constraint file: set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { Interrupt_1[0] }]; #IRQ This is my interrupt pin. I also set it up to interrupt on the falling edge. The Bitstream generated with no problems. Moving into SDK. I i
  14. Hello Jon. This is excellent! I just have one question regarding the block diagram: I see this Concat IP connects to the SPI interrupt. I presume "Concat" mean concatenate. If correct, I can see why it is needed for multiple interrupts. However, why is it needed for a single interrupt, like you have shown? Thank you Jon.
  15. Hello. I am trying to use one of the imported examples (xspi_intr_example.c) from within SDK (found link in system.mss in SDK). I want to use this "interrupt" example (I presume "intr" means "interrupt") to figure out how to use interrupts with MicroBlaze and SDK. No Interrupt Port Externals When I imported it, I got a compiler error regarding a missing header file: #include "xscugic.h". I found a copy of this file, and others linked to it (.c and .h files). Multiple copies with different versions are shown. I don't know which one to pick so I chose the set of files with the h