I am learning how to build an UART on Basys3 board. The UART took the received signal from the PIN RsRx and extracted the data. A Tera Term emulator sent the data to the UART through the COM port of the PC. When I sent the data (any number from 0 to 9), the led light LD18 TX on the Basys board blinked, but the UART displayed the different data with respect to the data sent. It can only display two numbers 0 and E. When I sent any number from 0 to 9, the UART displayed the number 0. When I send any character from a to z, the UART displayed the character E. I wonder if you see anything wrong in the overall approach/setup. Simulation demonstrated that the UART could receive data correctly. Bit streaming had the above issue. Switching from simulation to bit streaming involve only 2 simple changes, the source of clock and data signal.
My UART receiver utilizes a finite state machine to keep track of the receive data and its protocol, including start bit, 8-bit data, and stop bit. When I compiled it in vivado, it created an error message : combinatorial logic loop. I guess it did not like the state variable tracking the data as it goes from state to state in a circular manner. The resolution is to change it, but if it is understood, I could simply declare it in the *.xdc file as "set_property ALLOW_COMBINATORIAL_LOOPS TRUE [net_nets <myHier/myNet>". I tried that but it did not recognize the command net_nets. It said the command is not supported in the xdc constraint file. Why? Is it because I got the student discount version or something else? By the way what is <myHier/myNet>? The name of the variable that created the issue?