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Everything posted by toshas

  1. Trenz released board with 2 PMOD connectors for Ultra96
  2. Yes, but they did it only for several PMOD's. Digilent provides examples based on HDL code or C MCU code for most PMOD's. We are using a lot of Digilent sensors in education process and every year some students prefer to use them with Raspberry PI as system board. So they asking about python examples.
  3. Hi! There is a PMOD HAT for Raspberry PI - Actually DesignSpark provide support for very limited set of PMOD's (PmodAD1, PmodHB3, PmodISNS20, PmodMIC3, PmodOLEDrgb and PmodTC1) It would be nice to have Python examples for other PMOD's too (like TMP3, HYGRO, IMU, NAV and so on). Thanks!
  4. Hi! Here is a small anouncement New version of LINX will be released in May 2020 and beta is available now through Software Technology Preview website.
  5. Hi! Is it possible to unlock LINX forums ? Right now newly registered users unable to post anything there. So LINX disscussion would be continue on appropriate place.
  6. Hi! Since Digilent has no MPSOC boards right now. It would be nice to have HAT for Ultra96 board with several PMOD ports (4 or even more). (Similar HAT was already released for RaspberryPi.) What do you think about it ? I found almost the same request on another forum Someone want to order up to 100 boards.
  7. Hi! Is there any plans to upload sources of liblinxdevice .so on github? Raspbian Stretch has 1-wire support. It would be nice to add this interface to LINX. I can see only "dummy" project LinxDeviceLibWin (VS project for dummy liblinxdevice.dll) Thanks a lot!
  8. Hi! Check packets with Wireshark. It is good ethernet sniffer tools. You will be able to see what is actually inside your tcp packets.
  9. Hi! Check page 45 in It stated: N8 MGTREFCLK0P_112 PCIE_CLK_QO_P A13 (1) N7 MGTREFCLK0N_112 PCIE_CLK_QO_N A14 (1) So just create clock input pins in your block diagram with any names. After that define constraints in xdc file which connects your clk names to N7/N8 pins.
  10. toshas


    Sure! I'm sorry because of incomplete description. I would like to allocate some amount of memory inside of LINX. Then send offset address to external linux application. And then send some amount of data from external application.
  11. toshas


    Hi! MEMACC is a special VISA resource for memory allocation. Is it woking on LINX ? I can't find it. Is there any other available method for memory allocation in LINX ? Will "chroot system" be a problem for this task ? I found some info here (some kind of MMap API): Is it right direction ? P.S. I am linux user not a pro, so answers with explanation will be appreciated P.P.S. I know that this question is mostly for LINX developers but labviewmakerhub forums are almost stopped. So I deciced place my question here. Thanks a lot!
  12. Hi! Could you confirm that FMC-CE will work with Xilinx boards which has only 1.8V Vadj on FMC slot ? Thanks!
  13. Hi! According PCAM 5C reference manual: "If you are interested in obtaining a liquid lens capable version of the Pcam 5C, please contact Digilent using the Digilent Forum. " What should I do to order such kind of PCAM 5C ? Thanks a lot!
  14. toshas

    ZYBO SDSoc 2017.4 support

    Hi! Since latest SDSoc release Xilinx will not support Zybo board. page 9 : "Zybo and microzed platforms are now available only from the board vendors." Will you support this board (Zybo) or new one (Zybo Z7) in 2017.4 and upcoming versions of SDSoc ? When corresponding BSP packages became available ? Thansk a lot!
  15. Thanks a lot! Usually I use link from store page . It leads to rev B . And there is one strange moment in rev C schematic : no VCC net to VCC pins, only GND exist. Looks like a mistake.
  16. Hi! Recently I ordered PMOD VGA too. My PMOD is rev C. Could you upload schematic file ? As I understood only one difference is peresented - blue and green are swapped. Thanks!
  17. It seems like Digilent will release own PCAM module with CSI soon. You can see google images by keywords "digilent 5c pcam"
  18. Recheck XDC file it is a CASE sensitive. So top level port name should exactly match with names in XDC file. ddc_* vs DDC_* iic_* vs IIC_* Best regards.
  19. Hi! This project updated to 2017.3 is attached. Dvi2rgb ip core was updated from 1.6 to 1.8. And some minor modification was made in TCL scripts: vdma 6.2 -> 6.3, Vivado 2016.2 -> 2017.3, 720p_edid.txt -> Hope this will help to you! Best regards. hdmi_in_2017.3.rar
  20. Half-year passed. Is there any news (ETA for MPSOC boards) ? Thanks!
  21. Do you have any news about Zedboard successor board with Xilinx MPSOC ? Xilinx zcu102 has very expensive cost. Normal price is 5k usd. Limited offer is 2.5k usd. Waiting for the lower cost board like ZedMPSoC! Thanks!