PeterM

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PeterM last won the day on January 16 2017

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  1. PeterM

    Programming Flash CMOD A7

    @vc26: I was the one with problems with programming the flash. Are you at least able to load a design and get that running? It was indeed a bad USB cable that prevented me from programming the flash. Peter
  2. PeterM

    CMOD A7 Analog Inputs: Impedance too low for TMP36GZ?

    All: Adding in an opAmp sorted out this issue. Thanks for your feedback. Peter
  3. PeterM

    CMOD A7 Analog Inputs: Impedance too low for TMP36GZ?

    Hi Jon: Yes that seems to agree with my assessment about the TMP's current limit. Thanks for confirming my suspicion. Peter
  4. All: I'd like to get your thoughts on the following question: In https://reference.digilentinc.com/_media/cmod_a7/cmod_a7_rm.pdf, page 9. The Analog input circuit describes using a voltage divider to step a 0 to 3.3 range to 0 to 1 as required by the analog inputs. What I am also noting (and have measured) is that the input has a 3.3K impedance. I've been trying to get a TMP36GZ temperature monitor to work with this input and now suspect based on this temperature sensor's spec that the 3.3K draws too much current for this high impedance device. Has anyone else had any experience with limitation on the these analog inputs due to their lower impedance? Peter
  5. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    All: ROOT PROBLEM FOUND!!!!! It was the USB cables. (2 different ones preventing the flash from programming), I left my default cable at the office and used another this morning. My office setup had a powered USB hub that I connected my default cable to. My experiments this morning was with a different cable directly connected to a USB3 port on my laptop. I swapped for a third cable, and the programming worked. I would guess that the first two cables could not push the current required to erase the flash memory. ...not the first time I've had problems with the B style connectors........ Let's call this matter closed. Peter
  6. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    Hi Arthur: So I ran throught the tutorials as suggested. I was able to flash the software (.elf) file to offset 0x00300000 I was not able to program the hardware at offset 0x00000000 I am now convinced this is not a register issue, but that I have a damaged flash. Who can I speak to about an RMA? Peter
  7. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    Hi D@n: It might be possible that the QSPI is in a stuck state (ie XIP as you mentioned). I wish I could come up with definitive proof that its not broken. Thanks! Peter
  8. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    Hi Arthur: I think I've programmed this flash about 5 time, and it just stopped working yesterday. The error seems to be around erasing the flash. I've also attempted to "program_flash" with the -no_erase option and it fails on a bulk read. One (more Xilinx) question: if the page protection bits were set, does the "program_flash" have the awareness of this and is it able to disable the protection. Is this flash simply broken? (I wish I had a second CMOD A7 to swap in to my breadboarded layout.) Thoughts? Peter
  9. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    Hi D@n: Explicitly tried Programing the flash after a power cycle (my FPGA seems to come up in a "unloaded" state. The programming fails with an Erase error as noted before. Thanks for the suggestion. Peter
  10. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    Hi: So far, I've need the power cycle to re-load my FPGA after a failed attempt to erase while programming the flash. That said, your comments suggest that the previous FPGA application installed might subvert a subsequent attempt to program. Let me try flashing it after power cycling the A7. Thanks! Peter
  11. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    Hi Arthur: Thanks for the reply. I'll put together this build over the weekend and let you know what I learn. Peter
  12. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    All: More information: I attempted to just write to the device without erasing it (using no-erase option in program_flash). Here is what I get. Peter program_flash -f /home/pmeyer/WORK/DA-Test/ChameleonFPGA/UARTSlaveController/UARTSlaveController.sdk/top_hw_platform_0/cache/BOOT.bin -no_erase -offset 0x00000000 -flash_type n25q32-3.3v-spi-x1_x2_x4 -verify -cable type xilinx_tcf url TCP:127.0.0.1:3121 WARNING: [Common 17-259] Unknown Tcl command 'program_flash -f /home/pmeyer/WORK/DA-Test/ChameleonFPGA/UARTSlaveController/UARTSlaveController.sdk/top_hw_platform_0/cache/BOOT.bin -no_erase -offset 0x00000000 -flash_type n25q32-3.3v-spi-x1_x2_x4 -verify -cable type xilinx_tcf url TCP:127.0.0.1:3121' sending command to the OS shell for execution. It is recommended to use 'exec' to send the command to the OS shell. ****** Xilinx Program Flash ****** Program Flash v2016.3 (64-bit) **** SW Build 1682563 on Mon Oct 10 19:07:26 MDT 2016 ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. Connecting to hw_server @ TCP:127.0.0.1:3121 Connected to hw_server @ TCP:127.0.0.1:3121 Available targets and devices: Target 0 : jsn-Cmod A7 - 35T-210328A2B5A8A Device 0: jsn-Cmod A7 - 35T-210328A2B5A8A-0362d093-0 Retrieving Flash info... Initialization done, programming the memory Performing Program and Verify Operations... 0%...10%...Program/Verify Operation failed. ftdi_read_data failed: usb bulk read failed ERROR: Flash Operation Failed ftdi_read_data failed: usb bulk read failed xsct% child process exited abnormally
  13. PeterM

    CMOD A7: Possible broken Flash - How can I diagnose this

    All: Just to add to this: If I power cycle the FPGA, I am able to "Program FPGA" without a problem. If I attempted to "Program Flash" (and it failed with an erase error). I need to power cycle the device before attempting to "Program FPGA" Peter
  14. PeterM

    AXI XADC access to Aux4 and Aux12 pins via MicroBlaze

    Hi Jon: Thanks. It turns out that I was not putting a reference voltage on my external circuit to create a level for the aux4 and aux12 pins to see. I am also going to give your pdf a read as I am not completely satisfied with the calibration. Peter
  15. All: I've been incrementally developing both hardware (MicroBlaze with AXI peripherals) and software for the MicroBlaze itself. I've set up my software program size so that all software and hardware configuration can fit into a single .bit file. I've been able to program the flash several times, but yesterday have been getting errors while attempting to erase the flash. Notes are below. Is there a HW/SW program I could load onto the FPGA to prove or disprove that the flash is broken? Thanks!! Peter From the Vivado side: create_hw_cfgmem -hw_device [lindex [get_hw_devices] 0] -mem_dev [lindex [get_cfgmem_parts {n25q32-3.3v-spi-x1_x2_x4}] 0] set_property PROGRAM.ADDRESS_RANGE {use_file} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] set_property PROGRAM.FILES [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0]] set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] set_property PROGRAM.BLANK_CHECK 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] set_property PROGRAM.ERASE 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] set_property PROGRAM.CFG_PROGRAM 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] set_property PROGRAM.VERIFY 1 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] set_property PROGRAM.CHECKSUM 0 [ get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] startgroup if {![string equal [get_property PROGRAM.HW_CFGMEM_TYPE [lindex [get_hw_devices] 0]] [get_property MEM_TYPE [get_property CFGMEM_PART [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]]]]] } { create_hw_bitstream -hw_device [lindex [get_hw_devices] 0] [get_property PROGRAM.HW_CFGMEM_BITFILE [ lindex [get_hw_devices] 0]]; program_hw_devices [lindex [get_hw_devices] 0]; }; INFO: [Labtools 27-3164] End of startup status: HIGH program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices] 0 ]] Mfg ID : 20 Memory Type : ba Memory Capacity : 16 Device ID 1 : 0 Device ID 2 : 0 Performing Erase Operation... Erase Operation failed. ERROR: [Labtools 27-3161] Flash Programming Unsuccessful ERROR: [Common 17-39] 'program_hw_cfgmem' failed due to earlier errors. From the XSDK side: bootgen -arch fpga -image \ /home/pmeyer/WORK/DA-Test/ChameleonFPGA/UARTSlaveController/UARTSlaveController.sdk/top_hw_platform_0/cache/bootimage.bif \ -w -o \ /home/pmeyer/WORK/DA-Test/ChameleonFPGA/UARTSlaveController/UARTSlaveController.sdk/top_hw_platform_0/cache/BOOT.bin \ -interface spi program_flash -f \ /home/pmeyer/WORK/DA-Test/ChameleonFPGA/UARTSlaveController/UARTSlaveController.sdk/top_hw_platform_0/cache/BOOT.bin \ -offset 0x00000000 -flash_type n25q32-3.3v-spi-x1_x2_x4 -blank_check -verify -cable type \ xilinx_tcf url TCP:127.0.0.1:3121 ****** Xilinx Program Flash ****** Program Flash v2016.3 (64-bit) **** SW Build 1682563 on Mon Oct 10 19:07:26 MDT 2016 ** Copyright 1986-2016 Xilinx, Inc. All Rights Reserved. Connecting to hw_server @ TCP:127.0.0.1:3121 Connected to hw_server @ TCP:127.0.0.1:3121 Available targets and devices: Target 0 : jsn-Cmod A7 - 35T-210328A2B5A8A Device 0: jsn-Cmod A7 - 35T-210328A2B5A8A-0362d093-0 Retrieving Flash info... Initialization done, programming the memory Performing Erase Operation... Erase Operation failed. ERROR: Flash Operation Failed Server disconnected during TCF command /home/pmeyer/3rdParty/SDK/2016.3/bin/loader: line 164: 20344 Segmentation faul