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vvk

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Topics posted by vvk

  1.  

    Question: Inter core communication

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 8 answers
  2.  

    Question: Transfer data from pl to ps in zed board

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 3 answers
  3.  

    Question: Transfer of data from PS to PL in Zynq 702 SoC

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 4 answers
  4.  

    Question: RTL to GDSII File generation

    By vvk, in Other

    • Awaiting best answer
    • 0 votes
    • 1 answer
  5.  

    Question: 2 zedboard connection through FMC cable

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  6.  

    Question: Implementation failed without error or critical warning

    By vvk, in Other

    • Awaiting best answer
    • 0 votes
    • 1 answer
  7.  

    Question: communication between FPGA and processor in same board

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 2 answers
  8.  

    Question: Design with AXI TG ip core

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  9.  

    Question: AXI Traffic generator ip core

    By vvk, in FPGA

    • Awaiting best answer
    • 0 votes
    • 1 answer
  10.  

    communication between two processors in zed

    By vvk, in Suggestions & Feedback

    • 3 replies
    • 1,713 views
  11.  

    communication between two arm cores in zed board

    By vvk, in Suggestions & Feedback

    • 1 reply
    • 1,719 views
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