• Content Count

  • Joined

  • Last visited

About malkauns

  • Rank
    Frequent Visitor

Recent Profile Visitors

The recent visitors block is disabled and is not being shown to other users.

  1. I have a Zybo Z7 board I want to be able to dynamically load my .bit file after the system has booted. I am using In earlier versions I was able to do: cat file.bit > /dev/xdevcfg to have the bitstream loaded into the FPGA. However, /dev/xdevcfg does not exist for me. Is there something I have to configure when building the project and configuring the kernel to get this device to show up or is there some other way that I should be doing this?
  2. Thanks, I was able to get it to work after switching to initramfs. Really appreciate all your help!!
  3. I'm using Linux and am using this command to view output from the board: screen /dev/ttyUSB1 115200 Using a BOOT.BIN and image.ub that I have made a while back I can get the board to complete the boot process and make it to the prompt so there must be something that needs tweaking in this project. Is there some dtsi file that needs editing? Maybe some boot option is missing. Are you actually able the get this to boot on the Z7-10? Here's the boot log output where it gets stuck at "Starting kernel ...": U-Boot 2017.01 (Dec 18 2018 - 09:59:59 -0800) Model: Zynq Zybo Z7 Development Board Board: Xilinx Zynq I2C: ready DRAM: ECC disabled 1 GiB MMC: sdhci@e0100000: 0 (SD) Using default environment In: serial Out: serial Err: serial Net: ZYNQ GEM: e000b000, phyaddr 1, interface rgmii-id SF: Detected s25fl128s_64k with page size 256 Bytes, erase size 64 KiB, total 16 MiB Warning: ethernet@e000b000 using MAC address from ROM eth0: ethernet@e000b000 U-BOOT for Zybo Z7 ethernet@e000b000 Waiting for PHY auto negotiation to complete......... TIMEOUT ! Hit any key to stop autoboot: 4 3 2 1 0 Device: sdhci@e0100000 Manufacturer ID: 9f OEM: 5449 Name: 00000 Tran Speed: 50000000 Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 7.4 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes reading image.ub 2281992 bytes read in 225 ms (9.7 MiB/s) ## Loading kernel from FIT Image at 10000000 ... Using 'conf@2' configuration Verifying Hash Integrity ... OK Trying 'kernel@0' kernel subimage Description: Linux Kernel Type: Kernel Image Compression: uncompressed Data Start: 0x100000d4 Data Size: 2249752 Bytes = 2.1 MiB Architecture: ARM OS: Linux Load Address: 0x00008000 Entry Point: 0x00008000 Hash algo: sha1 Hash value: 133089f2029c5e4eeeea23f7e95c11a63be240c3 Verifying Hash Integrity ... sha1+ OK ## Loading fdt from FIT Image at 10000000 ... Using 'conf@2' configuration Trying 'fdt@0' fdt subimage Description: Flattened Device Tree blob Type: Flat Device Tree Compression: uncompressed Data Start: 0x102255e0 Data Size: 30947 Bytes = 30.2 KiB Architecture: ARM Hash algo: sha1 Hash value: 399c9df8f6c14fe63d1e25f5d3e1786d61310363 Verifying Hash Integrity ... sha1+ OK Booting using the fdt blob at 0x102255e0 Loading Kernel Image ... OK Loading Device Tree to 07ff5000, end 07fff8e2 ... OK Starting kernel ...
  4. Hi Vicentiu, Thanks for putting in the effort to make this work on the Z7-10. I really appreciate what you all are doing. However, I am unable to get the Z7 to boot fully. It gets stuck at "Starting kernel". Here are the commands I used to build Petalinux on a fresh install of Ubuntu 16.04 in VirtualBox: sudo apt-get update sudo apt-get install tofrodos gawk xvfb git libncurses5-dev tftpd zlib1g-dev zlib1g-dev:i386 libssl-dev flex bison chrpath socat autoconf libtool texinfo gcc-multilib libsdl1.2-dev libglib2.0-dev screen pax xterm python diffstat unzip libncurses-dev chrpath socat texinfo gcc-multilib libsdl1.2-dev sudo locale-gen en_US.UTF-8 sudo dpkg-reconfigure locales #ok.. ok.. ok sudo apt-get install tftpd-hpa sudo chmod a+w /var/lib/tftpboot/ sudo mkdir -p /opt/pkg/petalinux sudo chown $USER /opt/pkg/ sudo chgrp $USER /opt/pkg/ sudo chgrp $USER /opt/pkg/petalinux/ sudo chown $USER /opt/pkg/petalinux/ #download chmod +x ./ /opt/pkg/petalinux comment out the following line in /opt/pkg/petalinux/components/yocto/source/arm/layers/core/meta/conf/sanity.conf: INHERIT += "sanity" git clone --recursive wget -O system.hdf mkdir system.hdf_zip unzip system.hdf -d system.hdf_zip cp -r system.hdf_zip/* Petalinux-Zybo-Z7-20/Zybo-Z7-20/project-spec/hw-description/ #i'm assuming this is where to magic is supposed to happen for the Z7-10.. cp system.hdf Petalinux-Zybo-Z7-20/Zybo-Z7-20/project-spec/hw-description/ #..and here cd Petalinux-Zybo-Z7-20/Zybo-Z7-20/ source /opt/pkg/petalinux/ echo "configparams-sdk-launch-timeout 180" > .xsdbrc petalinux-build petalinux-package --boot --force --fsbl images/linux/zynq_fsbl.elf --fpga images/linux/system_wrapper.bit --u-boot cd images/linux cp BOOT.BIN image.ub /run/media/$USER/BOOT/ sudo umount /dev/sdb2 sudo dd if=rootfs.ext4 of=/dev/sdb2 sync eject /dev/sdb #insert SD card into Zybo Z7-10, make sure its in SD boot mode and power on #hangs at "Starting kernel" Please let me know what I need to do to get it fully booting on the Z7-10.
  5. Thanks Jon. Hope to hear from someone soon.
  6. Hi all, I am able to successfully build the PCAM demo project for the Zybo Z7-10 and can verify that it works. After importing the project into the SDK and letting it build, sdk/pcam_vdma_hdmi/Debug/pcam_vdma_hdmi.elf is generated. I would like to be able to run this application from with PetaLinux booted from an SD card so that I can control the camera as well as performing other operations within Linux. If I try to run the generated pcam_vdma_hdmi.elf as it is I get an "Illegal instruction" error message. What do I have to do to make this work from within a booted PetaLinux?
  7. Thanks for all the help! With your instructions I was able to get the demo working on the Z7-10 board. Hopefully this thread will help others who run into similar issues.
  8. Ionut, thanks for helping me understand things better. After succesful implementation I followed your stage 1 and 2 instructions exactly but when I get to stage 3 I do not see "pcam_vdma_hdmi" anywhere when the SDK comes up. This is what the SDK window looks like: Please advise.
  9. Thanks for your reply. I'm able to generate the bitstream for the Z7-10 after following your instructions. However, isn't the debug module required to communicate with the logic running on the board so that I can set camera options (resolution etc.)? After powering on the Zybo I am attaching to it over the serial port using screen /dev/ttyUSB1 115200 (on Linux). When I program the board from Vivado I am expecting the camera options text to show up in the terminal so I can make selections. In my case nothing shows up on the terminal. Please tell me if I am making the wrong assumptions about how this is supposed to work. My ultimate goal is to be able to send the sensor registers from Linux running on the PS to the camera sensor. error output: open_bd_design {/home/<user>/Downloads/Zybo-Z7-20-pcam-5c-master/src/bd/system/} set_property PROBES.FILE {} [get_hw_devices xc7z010_1] set_property FULL_PROBES.FILE {} [get_hw_devices xc7z010_1] set_property PROGRAM.FILE {/home/<user>/Downloads/Zybo-Z7-20-pcam-5c-master/proj/pcam-5c.runs/impl_1/system_wrapper.bit} [get_hw_devices xc7z010_1] program_hw_devices [get_hw_devices xc7z010_1] INFO: [Labtools 27-3164] End of startup status: HIGH refresh_hw_device [lindex [get_hw_devices xc7z010_1] 0] INFO: [Labtools 27-1434] Device xc7z010 (JTAG device index = 1) is programmed with a design that has no supported debug core(s) in it. WARNING: [Labtools 27-3361] The debug hub core was not detected. Resolution: 1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active. 2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device. To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'. For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).
  10. I've tried implementing it for the Z7-10 but get the following error: [Place 30-487] The packing of instances into the device could not be obeyed. There are a total of 4400 slices in the pblock, of which 2903 slices are available, however, the unplaced instances require 3493 slices. Please analyze your design to determine if the number of LUTs, FFs, and/or control sets can be reduced. Number of control sets and instances constrained to the design Control sets: 808 Luts: 16409 (combined) 18202 (total), available capacity: 17600 Flip flops: 18901, available capacity: 35200 NOTE: each slice can only accommodate 1 unique control set so FFs cannot be packed to fully fill every slice Critical warnings and error output:
  11. OMG you're right, I have the Z7-10 not the Z7-20. I must have been half asleep. Will test again when i'm back home.
  12. Ionut, thanks for your help. I was able to generate the bitstream. To note, I did have to "Reset Output Products" in order to get past a permissions error which according to the Xilinx forums occurs when the project is created on Vivado in Windows then implemented on Vivado on Linux. It may be worth trying to address this issue if possible. My next problem is that I encounter the following error when I try to program the device (Zybo Z7): ERROR: [Labtools 27-3303] Incorrect bitstream assigned to device. Bitfile is incompatible for this device. ERROR: [Labtools 27-3165] End of startup status: LOW ERROR: [Common 17-39] 'program_hw_devices' failed due to earlier errors. In the project settings I have made sure that "Zybo Z7-20 (xc7z020clg400-1)" is the current selected "Project device". Full output: Please help and thanks for your help so far!
  13. I am using Vivado 2017.4 on Linux and am trying to build the pcam demo project. The readme states "Created for Vivado 2017.4". After downloading and extracting and I am executing the following steps: cp -r vivado-library-master/ip/* Zybo-Z7-20-pcam-5c-master/repo/vivado-library/ <start vivado 2017.4 in tcl mode and cd to Zybo-Z7-20-pcam-5c-master/proj/> source create_project.tcl create_project.tcl produces the following output with error: ERROR: [BD 41-1665] Unable to generate top-level wrapper HDL for the BD-design '' is locked. Locked reason(s): * Block design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue. List of locked IPs: system_auto_pc_0 system_auto_pc_1 system_xbar_0 system_video_dynclk_1 system_MIPI_D_PHY_RX_0_0 system_clk_wiz_0_0 system_axi_mem_intercon_0 system_AXI_BayerToRGB_1_0 system_rgb2dvi_0_0 system_axi_mem_intercon_1_0 system_ps7_0_axi_periph_0 system_AXI_GammaCorrection_0_0 system_axi_vdma_0_0 system_auto_pc_2 system_MIPI_CSI_2_RX_0_0 system_v_axi4s_vid_out_0_0 system_processing_system7_0_0 system_rst_clk_wiz_0_50M_0 system_vtg_0 system_rst_vid_clk_dyn_0 system_xlconcat_0_0 ERROR: [Common 17-39] 'make_wrapper' failed due to earlier errors. while executing "make_wrapper -files [get_files $] -top -force" invoked from within "if {[llength $bd_list] != 0} { add_files -norecurse -quiet -fileset sources_1 [glob -nocomplain $src_dir/bd/*/*.bd] open_bd_design [glob -nocompla..." (file "create_project.tcl" line 123) Vivado% Full output: When I try to implement I get the following error: [Place 30-569] BUFIO instance 'SerialClkBuffer' is driving 'I' pin of instance 'SerialClk_OBUF_inst'{OBUF}. This will lead to unroutable situation. A BUFIO can drive only clock pins of IO tile Can someone please point me in the right direction?