[USB PROG/UART schematic request]

On 9/2/2020 at 12:08 AM, anshumantech said:

USB Prog USRT page is intentionally kept blank in circuit schematics provided by you for Arty A7-35T/100T board. Why?Is that something to do with you tying to protect some minor IP?

I can only surmise they do this as a result of an NDA with another party, or something similar, because I've reverse engineered the circuit on that part of the board and drawn the schematic and there's nothing special there at all--it's pretty much a bog standard implementation of what FTDI publishes on their site.

[USB PROG/UART schematic request]

Ah, yes, the infamous "This page intentionally left blank." page in the Arty schematic...

This page is the interface between the FTDI chip used to implement the Jtag interface to the Artix FPGA. I'm not sure exactly what Digilent is trying to protect here as the schematic is pretty straightforward (I have a schematic for this section of the board. I didn't get it from Digilent--I beeped it out from a dead Arty board and drew the schematic myself).

Please don't ask me for a copy--If Digilent doesn't want to give this info out, they must have their reasons and I'll respect that by not distributing my version.

[How to restore FT2232 EEPROM back to factory settings?]

Why are all of these requests handled via PM? Why not just post the solution here for all to see and use?