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  1. Like
    EllaRickerson reacted to JColvin in Hardware recommendation for Ethernet application   
    A customer on our website asked the following question:
    I have a project needing a controller with Ethernet and 25 GPIO, 20 data/address and 5 handshaking. The controller will be sent a small UDP packet with two 16 bit values which it will then write into a PIO interface on another device. The controller will then read two 16 bit values from the PIO device and send a return UDP. Suggested hardware?
    The response is below.
  2. Like
    EllaRickerson reacted to jpeyron in Hardware recommendation for Ethernet application   
    I would suggest the chipKit pro Mx4 or the chipKIT pro Mx7.  Both have an Ethernet , 25 GPIO and 20 data/address. I'm not sure what you mean by 5 handshakes, but they both have 5 external interrupts. 
    thank you,
  3. Like
    EllaRickerson reacted to steckdenis in Maximum power consumption on the Nexys Video   
    I successfully downloaded, implemented and run the Mandelbrot viewer of Hamster for the Nexys Video (https://github.com/hamsternz/FPGA_Mandelbrot). The only modification I had to do was to remove Genesys2-specific components instantiated in top_level and the input/output ports related to the PMods that I don't have. The modified design works perfectly well, Hamster's work is really amazing!
    At the beginning of top_level, a couple of constants allow us to configure how the Mandelbrot generator is built. I wanted to play with these constant and implement 2 multipliers (per pipeline stage) as LUTs, instead of using DSP slices. The result is a design with tighter timing (but still routable, it seems that Vivado 2016.2 improved timing for this design), but less DSP slices used.
    Another difference is that the design consumes more power. When running the power analysis on the original design (many DSP slices, not so many LUTs), 5W are reported. For the modified design (less DSP slices, more LUTs), 8W are reported.
    I thought that this would not be a problem, as I have a fan that does a great job at cooling-down the FPGA (45 °C for the reference design, 65 °C without the fan), but the Nexys Video board "reboots" when I try to program it with the 8W design. Basically, I program the board over JTAG, I get the message that says that programming was successful, but the board de-programs itself and returns to the original Digilent design (HDMI passthrough with temps on the LCD). If I put my bitfile on an USB thumb drive, programming works as expected, but then the board fails to run the design and re-programs itself from the USB drive (creating a programming cycle).
    I have seen that the voltage regulators used on the Nexys Video allow for a maximum of 8 amps on the 1V rail (FPGA core). Could this be the root of the problem? How much can the Artix 7 A200T consume if completely filled with a high-clock-rate design (like Hamster's)? Is there any way to still allow a large and complex design to run on the board?
    For reference, I have uploaded my bitfile here (the forum does not allows 6MB files to be attached to threads). This is a raw binfile for use with the Digilent Adept tools.
  4. Like
    EllaRickerson reacted to omikron in Zybo: HDMI Out with sound?   
    Is there HDMI output with the sound available for Zybo?
  5. Like
    EllaRickerson reacted to omikron in Zybo: HDMI clock frequencies allowed   
    When sending the picture over HDMI, how to choose the correct pixclk and serialclk?
    I have the project, that sends the RGB data at 7MHz pixel frequecy, for example. V=50Hz, H=15625. 
  6. Like
    EllaRickerson reacted to Bubblehead in Need help with EE Board power   
    I have an EE Board and am running WaveForms2015 v3.3.5 on a Mac computer.
    I am a little new to using this board and my lab for school requires a 1.5v reference to an operational amplifier. Under the "Supplies" tab VP+ and VP- offer 100mV increments until 1V and then only whole numbers are available. Vcc has 3.3V or 5V only and Vref uses the same increments as VP+/-.
    Is there a way to create custom voltage inputs? It needs to be analogue and not digital. Thanks for any help!
  7. Like
    EllaRickerson reacted to [email protected] in Need help with EE Board power   
    Well, let's see, if V=IR, and we want to split a voltage such as 3.3V into 3.3V, 1.5V, and 0 V, we could place two resistors between the 3.3V rail and ground, such as 6kW between 3.3V and 1.5V, and 5kW between 1.5V and ground.  Then you can tap off the 1.5V you just created between the two resistors as your reference.  Whether or not this will work for you depends upon whether or not you need a simple voltage reference, or whether or not you will be drawing significant current through the reference as well.  If the latter, than the resistor ladder I just outlined wouldn't work.
  8. Like
    EllaRickerson reacted to attila in Need help with EE Board power   
    Type in 1.5V
    This and similar fields of the application show a preset list but you can also enter custom values.
  9. Like
    EllaRickerson reacted to Bubblehead in Need help with EE Board power   
    I was too wrapped up in the lab and I did not even consider that, thanks!
  10. Like
    EllaRickerson reacted to [email protected] in Need help with EE Board power   
    Gosh that was too easy--I was trying too hard.  Sorry,
  11. Like
    EllaRickerson reacted to JColvin in Vivado schematic capture   

    Xilinx's Vivado Design Suite does not support schematic entry. If you happen to have schematic files from Xilinx's older ISE, you can convert those into HDL code as described in this thread on our technical forum.   Otherwise, the only other product that Digilent sells (but does not make) is the NI Multisim Student Edition, which does support schematic capture and can also export digital logic designs into VHDL. However, as Digilent only re-sells Multisim, we are not able to offer proper technical support for it so any technical questions you have about it would need to be directed to NI's forum. I also want to point out that NI does have some tutorial material available for Multisim here.   Let me know if you have any more questions.   Thanks,
  12. Like
    EllaRickerson reacted to JColvin in Vivado schematic capture   
    A customer on our website asked the following question:

    I have got a set of Digilent Basys3 and Vivado. I am intending to use the platform to conduct a year 1 undergraduate module on digital system where students learn about digital logic, combinatorial circuits and sequential machine. I notice that Vivado will you to program in VHDL or Verilog, do you know if it can allow you to program using schematic entry? In my course, as students are not exposed to high level programming, I would like them to get started with simple schematic entry using gates and flips-flops before they move onto HDL? If the Vivado does not allow, does your company have other products that allows schematic entry programming? Thank you.

    Best regards,
    The response is below.
  13. Like
    EllaRickerson reacted to JColvin in Digital Circuits materials   
    The Nexys 4 (the non-DDR version) with it's XC7A100T is actually targetable by both Vivado and ISE (surprisingly). It definitely threw me off for awhile since I thought 7-series were only target-able by Vivado as well. Funky, but true.
    As a side note, Digilent also has a similar set of Vivado tutorials like our ISE tutorials in addition to the materials that Dan linked to as well.
  14. Like
    EllaRickerson reacted to JColvin in Digital Circuits materials   
    A customer on our website asked the following question:
    I will be teaching a Digital Circuits (undergraduate) course in the Fall semester and I need all the help I can get. We will be using 'Diligent NexyS4 Artix-7 FPGA board and Xilinx_ISE 14.7. Could you inform as to where I might find tutorials and other materials that would be useful to someone who is starting from scratch with Xilinx? I would like to start with simple circuits.
    The response is below.
  15. Like
    EllaRickerson reacted to JColvin in PIC32 Max32 and chipKIT Network Shield Code helping.   
    Hi arslanweb,
    I looked into the DNETcK library (most recent version available at the chipKIT Network Shield Resource Center) and I do not see the getMyMac function that uses uses an address-of operator to find the MAC address, just one that uses a dereference operator, so I'm not sure what library version you are using, but I would recommend using that most recent library.
    As for the second portion, a number of the pins you intend to use conflict with pins that are dedicated specific parts on the Network Shield (a list of these pins is available here under the chipKIT pin column). Of those not listed in the column, the pin assignments that jump out at me are the pin 0 and pin 1 assignments which will directly conflict with the UART/USB interface between the Max32 and your computer, so your program will have difficulty uploading to the board (at least in my experience).
    As for using the analog pins as digital pins, you should just be able to directly use them as such with the digitalWrite function.
    Let me know if you have any more questions.
  16. Like
    EllaRickerson reacted to Bianca in Restoring chipKit Pro MX7 flash to factory   
    In order to reset your board, you could simply but a new bootloader on it. Attached here you can find instructions for the bootloader and you can also find the hex file here
    Best regards,
  17. Like
    EllaRickerson reacted to David Berger in "Cannot erase chip"   
    This may be the worst of the noob questions.
    I just purchased an uc32 as an upgrade to my use of arduino to get something more powerful and upon using the 1.6.8 arduino ide, the first sketch that I try to push to the board gives a "cannot erase chip" error.
    Sketch uses 19,096 bytes (3%) of program storage space. Maximum is 520,192 bytes.
    Global variables use 6,316 bytes of dynamic memory.
    Programmer for Microchip PIC32 microcontrollers, Version 2.0.186
        Copyright: (C) 2011-2015 Serge Vakulenko
          Adapter: STK500v2 Bootloader
     Program area: 1d000000-1d1fffff
        Processor: Bootloader
     Flash memory: 2048 kbytes
      Boot memory: 80 kbytes
             Data: 19096 bytes
            Erase: Cannot erase chip.
  18. Like
    EllaRickerson reacted to JColvin in PmodIA Arduino Water Conductivity Kohm/cm   
    Hi Meshal,
    I know right now the PmodIA library doesn't fully support all of the features of the AD5933, so from my understanding our applications team is taking a look into getting the library better supported, especially in terms of adjusting the output gain factors.
  19. Like
    EllaRickerson reacted to BKallaher in Register Manipulation in ChipKIT Core   
    Hi JayWeeks,
    Have you looked at this? It uses Timer2 but can be converted to use Timer3.
  20. Like
    EllaRickerson reacted to [email protected] in Maximum flash speed   
    I just purchased my first Arty, and I'm now preparing for the board to arrive.
    One of my goals with the Arty board will be to see how fast I can clock things both internally and externally.  As examples, I'm hoping to clock a custom CPU (the ZIpCPU) at 200MHz, to build a custom memory interface that will clock at 200MHz, and ... a flash controller at 200MHz that will generate a 100MHz flash clock.
    While preparing for this project, I noticed that the web page reference manual for the Arty states that the QuadSPI flash has a maximum clock rate of 50MHz.  The data sheet that I managed to find online, though, suggests that the same flash may be clocked instead at up to 108MHz. 
    Can you tell me if the 50MHz rate listed on the reference manual page for the Arty is a typo that should really read 108MHz, or if there is some other reason the flash clock is limited to 50MHz?
    P.S.  If anyone is interested in this project and its progress, let me know.  If you'd like, I could even open up a project and/or blog at OpenCores for it ...  Either way, I intend to share things in the Project Vault once they work.
  21. Like
    EllaRickerson reacted to JColvin in LabVIEW Home Edition Activation Problem   
    Hi Martin Foxx,
    My first guess (although I'm sure you already tested this, but just for the sake of completeness) is that the NI Account information was entered incorrectly. Presuming that's not the case, I also saw that the Operating System dropdown box was also empty. Luckily, I tried switching to another language via it's own dropdown box in the upper right corner and it auto-filled the OS for me. You can then switch back to English and keep the OS box filled in. So basically, it looks like a small bug on their website.
    Hope this helps!
  22. Like
    EllaRickerson reacted to JColvin in Zedboard USB port broken   
    I have asked some of our applications engineers about some of the next steps that you can take; they'll get back to you here on the forum.
  23. Like
    EllaRickerson reacted to aaleman in Rpi Camera - FPGA   

    I have been working with the Raspberry Pi Camera to make an interface with an FPGA and take the data from the camera to the FPGA memory. I want to connect the Camera Module directly with the FPGA but I have not found any document that explain the communication protocol or some procedure to make it possible to connect and configure the camera with the FPGA.
      If someone know any document or have an idea that can be helpful for my project I will be very grateful.   Thanks.
  24. Like
    EllaRickerson reacted to JColvin in Analog Discovery connectivity issues   
    I don't personally know the answer to your questions, but I have placed this question in the appropriate section of the forum where the engineer best suited to answer your question can see it.
  25. Like
    EllaRickerson reacted to [email protected] in Output voltage levels from the FPGA development boards   
    Perhaps the safest way would be to use a logic level shifter, such as this PMod.
    A cruder way, if you only need to go from 3.3V down to 900 mV is to put an appropriately sized resistor between the two.  For this, I'll say that 1) No, I don't know the value, and 2) on the last project I was on where someone used this technique the result was ... a mess.  So I know it is doable, but I've never done it.