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Ciprian last won the day on February 21

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  1. Hi @flying, There is a lot to unpack here. Firstly I would like to draw your attention to the fact that this post was originally started by malkauns regarding the porting of the petalinux project with PCAM capabilities to the Zybo Z7-10 board, very similar to a previous topic which you have started. If you follow the steps in the previous post by vicentiu you should have the HW configuration finished by vivado, and then all you need to run is: petalinux-config --get-hw-description=<PATH-TO-HDF-DIRECTORY> petalinux-build petalinux-package --boot --force --fsbl images/linux/zynq_fsbl.elf --fpga images/linux/system_wrapper.bit --u-boot In the Petalinux-Zybo-Z7-20 project and you should have everything working the way it's described in the projects readme. Secondly (although off topic), regarding the "the "desktop" of the Petalinux.", our petalinux project so far has no GUI in the FS(file system) therefore you will not be able to see anything on the HDMI display. The HDMI is currently configured as a pass trough, in the petalinux project, at 720p; which means everything that is sent via the HDMI RX connector is forwarded to the HDMI TX connector without processing. All of this is routed trough the FPGA, meaning that without programming the .bit into the FPGA, the HDMI will not work. For more details on this please refer to the block diagram of the Zybo-Z7-20-base-linux which is an intuitive description of what I explained here. Lastly, regarding the rest of the questions (also off topic), most are answered by reading trough the petalinux user guide ug1144 which describes how petalinux works and the workflow. I would also recommend reading up on how the Zynq processor is used in bare-metal and the role of the ps7_init files, the .bit, the .hdf and the BOOT.bin.Unfortunately going in to detail about these, would be hard without making it in to a tutorial or a step by step guide with page long explanations at every step. I hope this helped clarify some of your queries. -Ciprian
  2. Hi @Luighi Vitón, Thanks for your reply and for your heads up, I'm glad you managed to get it working. --Ciprian
  3. Hi @fangzr, It seems to me that you teacher has asked you to write a kernel driver from scratch (more or less) for a wireless module. Depending on what he expects the driver module to contain, you could either write only the driver for the module it self (RTL8812au for example) or the module and the corresponding dependencies which will make development very hard because you will need to integrate a lot in to the kernel. I have unfortunately no experience with WiFi kernel driver development, but I would take it one step at a time. Starting with understanding kernel drivers and what their role is and then looking over the WiFi kernel interface, you can read about this here, understanding the structure of it and then starting to write my own driver by looking at already existing one (RT3070 for example). I would also recommend to read about the various forms of kernel debugging like KGDB and how to do that or Xilinx has a brief step by step "tutorial" here about using Xilinx SDK for kernel debugging. It's no an easy task, Good Luck. -Ciprian
  4. Hi @fangzr, I am not familiar with RTL8812au, but I managed to set up a ath9k dongle driver for the Zybo Z7-20 with petalinux. For the ATH9K it's easier because it has the driver in the kernel you just need to activate it. Regarding the RTL8812au all I can tell you from experience is that some Wireless dongles need additional firmware, like the ATH9K, which will be loaded in to the wireless automatically over USB, provided you set up your USB port to identify mass storage devices. These should be copied in to the corresponding folder on the rootfs of your target. Another critical issue is the driver dependencies, some Wireless drivers need to have certain Kernel drivers loaded in order for them to work, like the MAC80211 stack in the Kernel for instance. Please make sure that your driver is not depended on anything else. Based on the log you have sent us, I would start with this. -Ciprian
  5. Hi @Mingfei, If you are referring to Arty-Z7-XX-hdmi-out, where XX is either 10 or 20, demo then you have series of solutions to make it work faster. Before I go in to detail regarding this let's talk a bit what the demo actually does. It basically reads one frame (dispCtrl.framePtr[dispCtrl.curFrame]) and then takes every pixel and inverts it in to the output frame (dispCtrl.framePtr[nextFrame]) this is a software approach (based on how DemoInvertFrame() is written) which means that it will depend on the processor how fast it can manage the data. Therefor stuff like printing text on the console (like printf("Volage.....)) will slow it down. As for the solutions there are 2 way to try and speed it up: 1. Software, VDMA has a feature called frame buffer parking you can read all about it in the User Guide (PG020 for v6.3), it basically parks the output frame on one buffer and lets you edit the other 2 frames without interrupting the video out stream. This will increase your out put to 50 fps but the refresh rate of what you want to do, the actual processing, will still only work at 5 frames. 2. Hardware, you could take advantage of your FPGA and write a IP core which does the inversion in HW thus offloading the task from the processor and getting to almost no processing delay; this of course means you will have to redesign your project. I would recommend writing the IP in HLS because it's easier and placing it at the output stage be teen the VDMA and the Subset Convertor. -Ciprian
  6. Hi @Luighi Vitón, I'm not sure it's a HDMI issue, have you tried to use X11 over SSH do you get the same result? -Ciprian
  7. Hi @AndyCap, Unfortunately I don't have the time to look in to this but judging by what you said I would look in to the IP driver of the audio system <kernel>/sound/soc/adi/axi-i2s.c (as far as I remember), how the buffers are handled in regards to the DMA transfer. The issue might be that full and the empty flags are nor properly handled in the driver or in the HDL IP. Sorry for not being able to help more. -Ciprian
  8. Hi, We are planning to update our project to 2018.3 but we don't have a precise release date for it yet. If it's not mandatory to use 2018.3 please stick with 2017.4 with this project for the time being. -Ciprian
  9. Ciprian

    Digital Twin

    Hi @Kris Persyn, It depends on how you manage your resources, driving immersive visuals on a HDMI display can be done in multiple ways at different resolutions, some are PL taxing others are DDR taxing; you could generate entire frame buffers in PL or PS or you could find a optimal algorithm to change just the previous frame or you could allocate a high number of frame buffers and then run them in a loop. It also depends on how math lab synthesizes the IP you will need to add to your design. If you design your project properly and don't aim for a resolution higher more 720p( I'm being conservative, we managed to drive the HDMI at 1080p with processing filters without a problem) I think it should be enough for what you want to do, resource wise. My suggestion, download and install Vivado, download and install the board files, create and implement your project look at the resource consumption and then buy a board. - Ciprian
  10. Ciprian

    zybo hdmi to vga out

    Hello @Gourav, Unfortunately the issue could be in multiple locations and it's hard to determine this from the block diagram, it's probably a small bug either in the block design or in the HLS IP. Either way please send the archive with project so that I can look over it. Thank you -Ciprian
  11. Try adding this: &i2c0 { clock-frequency = <100000>; status = "okay"; }; Here: <petalinux_project>/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi -Ciprian
  12. I'm not sure about this but I would look in to the HPD signal, as far as I know in the Nexys Video demo is set up so that the HPD is a pass-trough signal which might interfere with the zybo z7 design. I will ask our colleague who has more experience in HDMI if he has some input regarding your question. -Ciprian
  13. Hi @Amin, It depends on what you are planning to do. If you only need a Linux running on your Zybo Z7-20, then I can give you our pre-build BOOT.bin, kernel+rootfs images. This approach is based on our Demo HW platform, you will have the benefit of a lot of IPs in the design which allows a very versatile approach to the board, unfortunately this will not allow you to add any new IP to the design. If you want to build you own platform and base the on board Linux on it then you will need to install petalinux on linux(I recommend Ubuntu) and build/customize it the way you want, @jpeyron sent you the links for this in the previous post. -Ciprian
  14. Hi @kotra sharmila, Please follow the steps provided in this read me to modify/create your project. Please kkep in mind the following NOTE at step 12 - Ciprian
  15. Hi @Jeremy, Petalinux creates a series of .dts files based on your Hardware Description File, these are overwritten by the system-user.dtsi located in: <petalinux project root>/project-spec/meta-user/recipes-bsp/device-tree/files and the automatically created device tree files are here: <petalinux project root>/components/plnx_workspace/device-tree/device-tree-generation The petalinux project for Zybo-z7-20 from our github is configured based on this Vivado project which contains VTC, HDMI, I2S and other IPs. Consequently the system-user.dtsi is used to redefine parameters of the automatically generated device tree files. What you will have to do is rewrite the system-user.dtsi to suit your needs. Basically as far as I can tell from your .hdf you only have one axi gpio in the PL. This means that you will have to remove all the IP's from it which are not in your PL(you can see a list of them in the error you sent us) and if you want to use a different driver for your axi gpio IP you will have to add it to the system-user.dtsi and make the changes there -Ciprian