Mehdim

Members
  • Content Count

    30
  • Joined

  • Last visited

  • Days Won

    1

Mehdim last won the day on March 26 2016

Mehdim had the most liked content!

About Mehdim

  • Rank
    Frequent Visitor

Recent Profile Visitors

The recent visitors block is disabled and is not being shown to other users.

  1. Thanks for your answer; but I think it is not a warning, it is and error which prevent booting kernel and the boot process stops at U-BOOT.
  2. Hello everyone; I am trying to boot Linux on Zybo using this tutorial: http://www.instructables.com/id/Embedded-Linux-Tutorial-Zybo/?ALLSTEPS I have load Boot,bin, devicetree.dtb uImage and uramdisk.image intor fat32 partition of my 16 Gb sd card. size of uramdisk.image is around 5 Mb. when I boot the Linux, I have the problem like this, BAD DATA CRC h Do you have any experience on that ? is the size of kernel correct?
  3. Hello Is there any tutorial about how to install Petalinux on Zybo ? I have already installed Linux using this tutorial http://www.instructables.com/id/Embedded-Linux-Tutorial-Zybo/ but as you can see in my terminal, U-boot can not load Kernel
  4. Thank you JColvin; I think this thread if for the Arty board. is there any similar configuration file for Zybo DDR3 config? Bests
  5. Hello again guys, Do we need to set up something in the PL to use DDR3 Memory (something like Memory Interface Generator, MIG) or it is set by default?
  6. Hi again; What I am thinking is that maybe it is because of GCC that make binary file. It is possible that GCC makes wrong binary files which refers to memory location which does not belong to ARM A9. Would you please let me know which GCC you usually use for Zynq-700 with ARM A9 architecture? as you can see, there is not ARM A9 GCC in SDK list.
  7. Thanks Dan; I will try it and share the solution if i find.
  8. I do really appreciate your comment; but iI think it is related to some memory issue. you know it is trying to access the address 3758100524 which is not peripheral. my vote goes for "violation in memory access"; maybe the address 3758100524 is out of memory range of the Zybo board; but I dont know how to track this issue
  9. Hello Dan; Thank you for the prompt reply; this matrix library is a part of, I think, OpenCV which is commonly used in C++ for Matric operation. I initialize the matric by other values(not from board IO): for (i=0; i<xl; i++) {for (j=0; j<xl; j++) {m2(i,j)=Cxx[j];}} m2_inv = m2.inverse(); for (i=0; i<xl; i++) {for (j=0; j<xl; j++) {invCxx[j]=m2_inv(i,j);}} All peripherals if the board work fine.
  10. Hello all tech-lovers; Do any of you guys have experience using Eigen library (http://eigen.tuxfamily.org/index.php?title=Main_Page) in bared metal OS ? When I try to define a matrix like : xil_printf(" TP CC 0 \r\n "); MatrixXd m1(6,6); MatrixXd m1_inv(6,6); xil_printf(" TP CC 1 \r\n "); the program is compiled and built, but when running it on the board, it HALT happens! I saw the assembly code of the line that exception happens, it is 0010da80: ldr r0, [r0] in which r0= 3758100524 I think the halt is because of referring to the address( decimal: 3758100524, Hex: E000102C )which is out of range of the address bus of Zybo! However this code works fine on PC ( X86) But I don’t know why my c codes convert to this assembly code. I would appreciate if any of you guys have any hint or experience on that.
  11. Hello Alex; Really sorry for the late response; Here you can find some codes that I used: /* Audio controller registers */ enum i2s_regs { I2S_DATA_RX_L_REG = 0x00 + AUDIO_BASE, I2S_DATA_RX_R_REG = 0x04 + AUDIO_BASE, I2S_DATA_TX_L_REG = 0x08 + AUDIO_BASE, I2S_DATA_TX_R_REG = 0x0c + AUDIO_BASE, I2S_STATUS_REG = 0x10 + AUDIO_BASE, }; #endif XIicPs Iic; /* Instance of the IIC Device */ XNco Nco; u8 audio_flag; int AudioInitialize(u16 timerID, u16 iicID, u32 i2sAddr) { int Status; XIicPs_Config *Config; u32 i2sClkDiv; TimerInitialize(timerID); /* * Initialize the IIC driver so that it's ready to use * Look up the configuration in the config table, * then initialize it. */ Config = XIicPs_LookupConfig(iicID); if (NULL == Config) { return XST_FAILURE; } Status = XIicPs_CfgInitialize(&Iic, Config, Config->BaseAddress); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Perform a self-test to ensure that the hardware was built correctly. */ Status = XIicPs_SelfTest(&Iic); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Set the IIC serial clock rate. */ Status = XIicPs_SetSClk(&Iic, IIC_SCLK_RATE); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* * Write to the SSM2603 audio codec registers to configure the device. Refer to the * SSM2603 Audio Codec data sheet for information on what these writes do. */ Status = AudioRegSet(&Iic, 15, 0b000000000); //Perform Reset TimerDelay(75000); Status |= AudioRegSet(&Iic, 6, 0b000110000); //Power up Status |= AudioRegSet(&Iic, 0, 0b000010111); Status |= AudioRegSet(&Iic, 1, 0b000010111); Status |= AudioRegSet(&Iic, 2, 0b101111001); Status |= AudioRegSet(&Iic, 4, 0b000010000); Status |= AudioRegSet(&Iic, 5, 0b000000000); Status |= AudioRegSet(&Iic, 7, 0b000001010); //Changed so Word length is 24 Status |= AudioRegSet(&Iic, 8, 0b000000000); //Changed so no CLKDIV2 TimerDelay(75000); Status |= AudioRegSet(&Iic, 9, 0b000000001); Status |= AudioRegSet(&Iic, 6, 0b000100000); if (Status != XST_SUCCESS) { return XST_FAILURE; } /* i2sClkDiv = 1; //Set the BCLK to be MCLK / 4 i2sClkDiv = i2sClkDiv | (31 << 16); //Set the LRCLK's to be BCLK / 64 Xil_Out32(i2sAddr + I2S_CLK_CTRL_REG, i2sClkDiv); //Write clock div register */ return XST_SUCCESS; } /* ------------------------------------------------------------ */ int AudioRegSet(XIicPs *IIcPtr, u8 regAddr, u16 regData) { int Status; u8 SendBuffer[2]; SendBuffer[0] = regAddr << 1; SendBuffer[0] = SendBuffer[0] | ((regData >> 8) & 0b1); SendBuffer[1] = regData & 0xFF; Status = XIicPs_MasterSendPolled(IIcPtr, SendBuffer, 2, IIC_SLAVE_ADDR); if (Status != XST_SUCCESS) { //xil_printf("IIC send failed\n\r"); return XST_FAILURE; } /* * Wait until bus is idle to start another transfer. */ while (XIicPs_BusIsBusy(IIcPtr)) { /* NOP */ } return XST_SUCCESS; } //-------------------------------------------------------------------------------------------------------------------------------------- void AudioSampleR(u32 *data, u32 number) { u32 i; for(i=0;i<number;i++) { data = Xil_In32(I2S_DATA_RX_R_REG); } return; } //-------------------------------------------------------------------------------------------------------------------------------------- void AudioSampleL(u32 *data, u32 number) { u32 i; for(i=0;i<number;i++) { data = Xil_In32(I2S_DATA_RX_L_REG); } return; } //-------------------------------------------------------------------------------------------------------------------------------------- void AudioPlayR(u32 *data, u32 number) { u32 i; for(i=0;i<number;i++) { Xil_Out32(I2S_DATA_TX_R_REG, data); } return; } //-------------------------------------------------------------------------------------------------------------------------------------- void AudioPlayL(u32 *data, u32 number) { u32 i; for(i=0;i<number;i++) { Xil_Out32(I2S_DATA_TX_L_REG, data); } return; } Hope it helps. If you have any further question shoot me an email at mehdim@umich.edu
  12. Mehdim

    AXI performance monitor

    Hello; have any of you guys had any experience with axi_perf_mon IP core? can you refer me to a help or tutorial of it?
  13. Hello again guys; Finally I found the solution; to me there is something wrong with the IP core at http://www.instructables.com/id/Digital-Filters-on-Zybo-Board/?ALLSTEPS As a solution, I have download ip core entitled “zed_audio_ctrl_0” from http://embeddedcentric.com/adc-dac-and-digital-audio-processing/ then all you have to do is to configure the codec from I2C and then easily read and write from\to I2S channel by in_left = Xil_In32(I2S_DATA_RX_L_REG); in_right = Xil_In32(I2S_DATA_RX_R_REG); Xil_Out32(I2S_DATA_TX_L_REG, in_left); Xil_Out32(I2S_DATA_TX_R_REG, in_right); if it helps and i can be of more help please let me know
  14. Hello again guys, I am trying to simplify the project on http://www.instructables.com/id/Digital-Filters-on-Zybo-Board/?ALLSTEPS and run it on a standalone OS. So I just added “axi_i2s_adi_0” IP core to design and mapped IOs to audio codec ports. The issue is that right now I can capture data from microphone or line-in and see signal on “SDATA_I” port on oscilloscope; but when I try to send this data to I2S, I cannot see” SDATA_O” and it stuck on 0; and therefore I have no audio on “HPH out” Do you have any comment or hint on this?
  15. Does anybocy here know the functionality of CTRL and onoff port in serialeffect IP core? When I enable “onoff” port, a noise will be generated at output of voice