aramosam

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  1. aramosam

    Reprogram (reset) FPGA

    So finally I've tried this solution and worked perfect. Be aware that the reprogram it’s going to be triggered when the output signal is 0. In my case (inside Vivado I made the following statement): reprogram_output <= NOT reprogram_circuit_signal While I’m performing my experiments with the other solution, I’m trying to implement this solution in order to release a “non wired” solution. Thank you all for your answers.
  2. aramosam

    Reprogram (reset) FPGA

    Thank you for your answer Arthur, The script seems an option. Unfortunately, in my case, I must reprogram the FPGA with the .bin in the QSPI because I'm going to perform a fault injection campaign and the board is going to be reprogramed a lot of times. Reprograming with Vivado takes a lot more time tan QSPI, and because this operation is going to be performed several times, the experiment could take too much time in finishing (we are talking about weeks). Thanks, Alexis
  3. aramosam

    Reprogram (reset) FPGA

    Hello all, I have a Nexys4 DDR and I want to reprogram it, as it's done with "PROG" button. As example I want to connect the IPROG/Program_B signal to be triggered when something happens like the output of my circuit is "1", or using a switch. How can I do that? I've read documentation about multiboot but I don't want to load two bitstreams, only one and reprogram the FPGA with it when I want. I suppose that using the Program_b signal is the way to go but I don't know how I can use it. Some code, tutorial or documentation would be appreciated. Thank you