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  1. I want to use the flash memory of 32Mbits of the basys 3, to write data in hexadecimal, I am using microblaze and the IP block axi quad spi, I have configured the hardware in vivado, i have included the soft-core microblaze and I have added the IP block Axi_quad_spi and I have connected the ext_spi_clk, s_axi_aclk (synchronously), with the 100 MHz clock, automatically vivado connected the outputs to the pins of the flash memory of the basys 3 card, so my question is: to program the memory in the SDK of xilinx, is there an example already done with this memory ?, or how can i program it?
  2. yes i have tried, Actually i have managed how to program my .elf file and my .bit file using the USB Host, and with this i dont use the PC to program the FPGA
  3. I think in the flash memory won't work because only have 32 Bits of flash storage, so how can I programm both files; the .bitstream that vivado create and the .elf file that SDK create, using USB Host Programming, in its datasheets says the following. USB Host Programming: You can program the FPGA from a pen drive attached to the USB-HID port (J2) by doing the following: 1. Format the storage device (Pen drive) with a FAT32 file system. 2. Place a single .bit configuration file in the root directory of the storage device. 3. Attach the storage device to the Basys 3. 4. Set the JP1 Programming Mode jumper on the Basys 3 to "USB". 5. Push the PROG button or power-cycle the Basys 3. The FPGA will automatically be configured with the .bit file on the selected storage device. Any .bit files that are not built for the proper Artix-7 device will be rejected by the FPGA. The Auxiliary Function Status, or "BUSY" LED (LD16), gives visual feedback on the state of the configuration process when the FPGA is not yet programmed:  When steadily lit, the auxiliary microcontroller is either booting up or currently reading the configuration medium (pen drive) and downloading a bitstream to the FPGA.  A slow pulse means the microcontroller is waiting for a configuration medium to be plugged in.  In case of an error during configuration, the LED will blink rapidly. Basys 3™ FPGA Board Reference Manual Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Page 6 of 19 When the FPGA has been successfully configured, the behavior of the LED is application-specific. For example, if a USB keyboard is plugged in, a rapid blink will signal the receipt of an HID input report from the keyboard.
  4. I have developed a project on vivado using IPs of Xilinx, especially microblaze that is a softcore, so i programed microblaze in the SDK, but I want to store my hardware that I made in vivado and the program of the SDK in the non-volatile memory of the board basys3, so each time that I turn on the board basys3, automatically my project start without reprogramming the FPGA using the pc, if you could provide a tutorial step by step how to do that, I would thank you a lot.
  5. I want to implement an analog temperature sensor (LM35) using Microblaze on Vivado, I want to use an IP and i have tried use the XADC but is very complicated its configuration, so my question, Is there some IP that along with Microblaze allow reading of an analog signal?
  6. When i made the IP MIG configuration and run the RTL analysis on the schematic, appears this: (when i dont set anything of the IP configuration the pins "clk_ref_p/n" dont appear and the following message does not appear ). and i cant asing the ports specialy the T4
  7. Thanks Dan but i still in the same problem whit the clk_ref_p/n, when i run the synthesis it ocurrs a problem
  8. But in the tutorial of digilent the "pin : sys_clk_i" has a clock of 200 MHz, so the DDR3 is working on that frequency or the IP MIG made it works at 400 MHz without customizing?
  9. I have implemented the DDR3 on the Nexys VIDEO as shown in this tutorial so my question is how can i mofidfied the IP MIG for reach 800 Mb/s on the nexys video? when i open the IP for modified teh parameters in clock period i set 2500 ps, input clock period 1250 ps (800 MHz), system clock : No buffer, Reference clock: Diferencial, clk_reference with pin number R4/T4, so when i run the synthesis occurs a problem in the clk_ref Note: some of the setting of my IP MIG In this part i connect the pins R4 and T4 in the CLK_ref_p and CLK_REF_n. but in the synthesis occurs a problem
  10. I´m learning the arty board, so i just want to know which is the max frequency for write/program on the DDR3, using vivado and microblaze