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Everything posted by Tifei

  1. Hi, I read few messages on the forum but I would like to confirm if my understanding is right. I have a Digilent JTAG HS-2 cable. I installed Digilent Adept 2. I have my Xilinx FPGA BSDL file. I installed Vivado. Can I do boundary scan with above "weapons"? What I want to do is run BSDL to check my FPGA pin connectivity and to see if the FPGA is good or bad. From the Forum research the answer is NO. Do I understand this correctly? Please advice, thank you.
  2. Hi Jon, After studying the Adept 2, my questions concern the "target device" of the JTAG-HS2 programming cable. 1) Can the HS2 talk to any non-xilinx jtag-compliant target device? 2) I don't yet have the HS2 cable, and there is no target hardware available yet. But going through the adept sdk jtag demo (using visual studio c++ environment), the executable requires a "device name" argument. Where and how can this "device name" be found? Please advice, thank you. Tifei
  3. Thanks Jon, I will start my advantage. If I have further question I will come back. Have a good day!
  4. Thanks Jon, We take your advise by using JTAG-HS2. I also notice the Adept 2 is free downloaded including System, Utilities and SDK. 1. Should I install all 3 of them? 2. Can I install them in Windows 7 Professional or Windows 10 pc? 3. Can you provide an Adept 2 example? Something simple where I can start with. Thank you. Tifei
  5. Hi Jon, Thanks for the reply. Please correct me if I am wrong: 1. Recommend using JTAG-HS2 instead of JTAG-USB. The reason is that JTAG-HS2 has VDD voltage level design but JTAG-USB does not. It looks like JTAG-HS2 is newer than JTAG-USB cable? 2. Don't use AVR programmer since it is obsolete. 3. I am not using this JTAG-HS2 to configure Xilinx FPGA at all. So no Vivado tool is involved. I am using it to send in custom waveform into my own chip. For example, toggle 5 times at TMS while TDI is pulled high. To achieve this I need to use Adept SDK, am I right? Please adv
  6. Hi, We are going to purchase JTAG-USB Cable to debug our own developed chip. 2 questions here: 1. I assume this JTAG-USB Cable is able to auto-sense my VDD voltage level as long as it is within the range 1.8V ~ 5.0V. Is this correct? 2. We need this JTAG-USB Cable to do some configuration in our chip. Do I use "Digilent Adept Suite" or "Digilent AVR Device Programmer" to generate my JTAG signals/waveforms ? And one request: 1. I need a datasheet of JTAG-USB Cable datasheet if possible. Please advice, thank you. Tifei
  7. In Genesys2 Development Kit VADJ has 4 options: 1.2V 1.8V 2.5V 3.3V which controlled by JP6. I would like to apply an external power supply with a fine tune feature to VADJ on my Genesys2 Development Kit. The purpose is to scan I/O voltage with a 10% range at 1.5V(1.40 ~ 1.60V) and 1.8V(1.70 ~ 1.90V) then see the influence on I/O performance. Checking the schematics page 20, I found I can remove R408, then solder my power wire on it. But I see a current/power monitor IC34 is connected to R408 as well. Will removing R408 bring trouble to IC34 and IC37 power regulator? Will this modificatio
  8. I check the Genesys 2 Kintex-7 FPGA Development Board schematics and found board provides 1.2V, 1.8 V, 2.5V, and 3.3V to banks connected to FMC. It is selected by jumper JP6. In my application I need 1.5V. Can I modify the resistor value so that I can have 1.5V instead of other values? Please advices, thank you.