Josh

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Posts posted by Josh


  1. The Embedded Linux Materials is about 2 months out. But the Advanced Microblaze Design with MIG, Ethernet, UART & GPIO is already out, we renamed it Getting Started with Microblaze Servers, you can check it out here, there's also a Getting Started with Microblaze here.


  2. On the same vein as lijieming's post, it looks like you're using a 4 GB SD card. I would recommend using an 8 GB Micro SD Card (the one we sell will not have any problems with the ZYBO, other SD cards might).

     

    Another user came across the error below while booting:

    Turns out my ZYBO_BOOT partition did not have a FAT32-32KB Cluster format. For some reason I could not do this with 1GB so I had to up it to 4GB. 

    -Josh


  3. Hi,

     

    Any update ?

     

    By the way, I'm using a 4 GB SD Card and something is filling up my SDc until saturation : /dev/root Use = 100%. After that, the system won't boot.

     

    Thus, I'm wondering if that's the reason why you have used a 8 GB SDc. The results are the same for 2 different filesystems of Linaro.

     

    Best

    Mendeln

    To boot Linux using the Linaro filesystem how we did, use an 8 GB microSD Card. 4 GBs is going to be too small.

     

    -Josh


  4. I looked through the reference manuals for the two cables and I think I found what you're looking for. 

    In the Xilinx Zynq-7000 and SoC Support section of the JTAG-HS3 cables it says:

    The Xilinx Tools occasionally require the processor core of the Zynq-7000 to be reset during debug operations. The Zynq platform processor has a pin dedicated for this purpose (PS_SRST_B). Driving the PS_SRST_B pin low causes the processor to reset while maintaining any existing break points and watch points. The JTAG-HS3 is capable of driving this pin low under the instruction of Xilinx’s SDK during debugging operations. In order for this to work, pin 14 of Xilinx JTAG header on the target board must be connected to the PS_SRST_B pin of the Zynq (see Figs. 3 & 4). 

    [Figs. 3 & 4]

    The JTAG-HS3 uses an open drain buffer to drive pin 14 of the Xilinx JTAG header (see Fig. 5). This allows the HS3 to drive the PS_SRST_B pin when VCC_MIO1 is referenced to a different voltage than VCCO_0 (see Fig. 6). 

     Here's a link to the  relevant section in the JTAG-HS3 reference manual.

    I hope this helps!

    -Josh


  5. Hi Mike, 

     

    I'm unsure about the problem you're having, but I would suggest checking out this tutorial about setting up the Ubuntu on the ZYBO: http://www.instructables.com/id/Setting-up-the-Zybot-Software/?ALLSTEPS

     

    In particular, Step 6 has the boot files that are needed to run Ubuntu after you have everything else ready.

    We are also going to be writing a new embedded systems tutorial designed specifically for the ZYBO, so stay tuned!

     

    -Josh