LucasFroze

Hi Digilent Masters, I'm starting to work on a mini project which reading back PmodAD2 VinX data from Arria 10 FPGA dev kit through I2C interface. I'm using Quartus to develop the code, and enabled weak pull up resistor on both SCL & SDA in Quartus The Vcc is connected with 5V and Vin1 - Vin4 are connected with inputs which have max 1.8V. When I measure my SCL with DMM, it shows only 1.4V when HIGH and drops to 0.3 when SCL goes LOW. From the PmodAD2 schematics, it tells me this is definitely not meeting the requirements. What did I do wrong? FYI, I'm new to FPGA design Would be appreciated if anyone can offer their insights on this issue. Regards, Lucas Kang