Bianca

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Bianca last won the day on February 8

Bianca had the most liked content!

About Bianca

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  • Gender
    Female
  • Location
    Romania
  • Interests
    PCB, hardware, electronics, FPGA, power supplies, power electronics

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  1. Hi @Chouchene, You have a private message. Regards, Bianca
  2. Hi @NotMyCupOfTea, We have an old ZedBoard programming tutorial. This was not checked for a while so might contain errors. Also, it's made for older versions of Vivado SDK. Things might be a bit different with the current versions. It goes through the steps @xc6lx45 mentioned above. I hope it helps. https://reference.digilentinc.com/learn/programmable-logic/tutorials/zedboard-programming-guide/start?s[]=qspi Bianca
  3. @AJ_Horto, @jpeyron, Another way would be to physically connect the pmod pin to GND with a wire. In that way you are not relying just on the FPGA pulldown. If the led would be still on after the pin is physically wired to GND, then the board is defective. Cheers, Bianca
  4. Hi @jfdo, It's stereo, but you have to use both AWG channels. You need one for each speaker. Regards, Bianca
  5. Bianca

    ARTY A7-35 REV E.

    Hi @Djsnzheusj, The XDC for D.0 will work. We made a spin for the power supplies. Nothing in the FPGA configuration was affected by the new PCB spin. Regards, Bianca
  6. Hi @freakuency, On Arty Z7 reference page you can see a step model for the board on Additional Resources section: https://reference.digilentinc.com/reference/programmable-logic/arty-z7/start If the step file doesn't help you, You have here some dimensions for the Arty Z7. Regards, Bianca Arty_Z7_Drawing.pdf
  7. Hi Kate, I'm sorry to hear your zybo is dead. If you are lucky, the fuse might be blown. You can remove it and change it with another one, or take it off for good and make a short circuit between the pads of the fuse. However, if you do this, you will no longer be protected in case something goes wrong with the power. The package of the fuse is quite big, so if you have a solder iron you might be able to remove it. If you don't have or you fear that you might ruin something else, take it to a local shop in your area to rework it. Let me know if you manage to power it up. Regards, Bianca
  8. Hi Alejandro, Unfortunately, we don't have C code available for PmodIA, however, Analog Devices who manufactures the AD5933, that's the core of the PmodIA has some reference projects. They have an example with the zedboard and the files might help you. You can check on their github, here: https://github.com/analogdevicesinc/no-OS/tree/master/Pmods/PmodIA You can also take a look on their wiki page, here: https://wiki.analog.com/resources/fpga/xilinx/pmod/ad5933 Regards, Bianca
  9. Hi @srss, The DMM Shield is compatible with Mega (as is with Uno, Due). All the pins used by DMM shield are connected to the Arduino Mega. As @kwilber said, there are some extra pins that are not mated with Arduino. We loaded those just to have full compatibility with our Chipkit boards that have the extra rows. As you can see in the picture below. All the signals that the DMM Shield are using are on the outer pins of the connector to assure the compatibility with Arduino. The rest are loaded in case you need to stack other shields on top of the DMM to have access to the chipkit pins. I hope this helps you. Best regards, Bianca
  10. Here you have the board files: https://github.com/Digilent/vivado-boards and you can follow this tutorial to install them: Copy the contents of the board_files folder Navigate to the board_files folder in the Vivado Installation directory (C:\Xilinx\Vivado\2015.1\data\boards\board_files) - 2015.1 will be replaced with your current version of Vivado Paste the contents into the board_files folder Restart Vivado -Bianca
  11. Hello @aeon20, Welcome to the forum and to the world of FPGA. There are some tutorials available. I will guide you to this one on Vivado that actually does led blinking: https://reference.digilentinc.com/vivado/getting_started/2018.2 You can find some resources here: https://reference.digilentinc.com/learn/programmable-logic/tutorials/start and if you look for Nexys 4DDR (which is the old name for Nexys A7) you can find other things. I suggest you to start with led blinking. Connecting the switches to the leds, trying to work with the seven segment display, and moving forward to the VGA. We have some components example in the learn section of our website: https://learn.digilentinc.com/classroom/ I think this might be a good start for you until you get your hear around the board. I hope you'll enjoy the learning process. Best regards, Bianca
  12. Hi @Spencer_c, You have a private message. Best regards, Bianca
  13. Hi @elizegi, You'll have a private message in a few minutes... Regards, Bianca
  14. Hi @lukowo, You have a private message. Best regards, Bianca
  15. Hi @chrisdoe, The full schematic of the circuit looks like this. I re-annotated the components : On the right side of the circuit you have the DIO. Normally the voltage in that point is smaller than 5.7V so D1 is closed....Because of that the voltage in the emitter of Q2 is 5.2V On the left side of the circuit the situation is as follows. Q1 is basically a Diode. The voltage in the Base of Q1 is the same with the voltage of Q2. The value of the voltage is 6V- 0.6V that we'll loose across the diode so about 5.4V. Because Q2 has in Emitter 5.2V and in Base a constant 5.4V, Q2 is closed so no current goes through there. Now, if we raise the voltage in the DIO pin above 5.7V, D1 starts to conduct and current starts flowing towards D2. This will increase the voltage level in the emitter. If that goes above the voltage value that Q2 has in base (5.4V), Q2 opens and current starts to flow. This will open Q3 that will pull down. This is the principle behind this circuit. You asked about C223. That one is parallel with Q1 that is basically a diode, so you have a schottky diode. For your second question regarding the protection to 3V3. Because the level voltage is settable. Vrefio was used to detect the middle point and that is done by this circuit The Input divider circuit is redrawn below so you can see it better is as follows: to From this point we can write Milman equation and you have that VFPGA= (510k*Vin+51k*Vrefio)/(510k+51k) and this should be <3.7V which is the max absolute that the FPGA pin can receive. In case something goes wrong, we put en extra protection on the FPGA pin to make sure it won't burn the FPGA bank. I hope this helps you better understand the circuit. Best regards, Bianca