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Ardelle Froeliger

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    Ardelle Froeliger reacted to JColvin in How to download FPGA bitstream file to Digilent FPGA board   
    Hi @Ardelle Froeliger,
    If you want to load a bitstream to a board, you would first need to create a project for it in the appropriate Xilinx software (usually Vivado for Digilent's current board offerings), and then click on the appropriate in-software button to generate a bitstream. If you made a project with only HDL you could follow this guide to program the board with the bitstream, https://digilent.com/reference/programmable-logic/guides/getting-started-with-vivado, otherwise if you are using a block design flow this guide would be more helpful for you: https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi.
    Let me know if you have any questions about this.
    Thanks,
    JColvin
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