Alessandro Reineri

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  1. Hello everyone! I am a FPGA rookie programmer and I have recently bought an Arty Z7-20 board for a university project. I intended to write a simple RTL HDMI transmitter with TMDS encoder. However, I found difficulties in implementing the design on the target FPGA, although all simulations I run on Vivado stated the correct top-module behavior. I also tried to implement the Diglilent official HDMI out demo for Z7-20 package but it did not work neither. Any suggestions ? I am sharing all my project's files attached to this post. Thanks in advance to everyone which will provide any help. P.S