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  1. Hello @Cristian.Fatu, Thank you very much for the reply and answer. However I have made correct AC coupling settings for both channel. After more digging into the IP, I found that there is small mistake for channel 2 coupling Handling. So, basically the AC_DC coupling for channel 1 and channel 2 are inverted. You can find the same in the attached screenshot of RTL for ZMOD 1410 LLC.(Highlighted Lines).
  2. Hello friends, I am working on Eclypse Z7 with ADC ZMOD1410, I have performed acquisition of the signals as per my requirement. I am using two ZMOD’s with four channels for acquisition of signals. However, I need clarity on output format of channel 2(or B) of each ZMOD’s, whether it is in 2’s complement form or gray code format. When checked into the VHDL code of ZMOD low level controller 1410 IP, the ADC SPI command is x"001421" which is written for 2’s complement and followed by x"000502" means device index B and that can be verified with datasheet. But at the same time, in the com
  3. Hello @zygot, Thank you very much for the reply. I have gone through all the discussion you have done in the forum regarding the Eclypse Z-7 and also the PoC project you did with opal Kelly XEM7320 with 2 ADC1410 ZMODs, that’s very cool. However, I am restricted to use only the Eclypse Z-7 platform with two ZMODs. My application is to capture three pulsed shaped signals (with pulse width between 1-10 us) from an optical module, and those signals will be in sync with each other. As of now the main purpose of the captured data will be for analysis and further to find correlation betwee
  4. Hello Friends, I have to implement simple data acquisition system using Eclypse Z-7 and Two ZMOD ADCs. However, my requirement is to use four ADC channels in order to capture four different signals using two ZMODs with synchronization between them and make the data available to user using any mechanism. I have been going through the provided baremetal and linux demo's and also through the low level ZMOD ADC controller and AXI based IP. In an order to implement the design, I was thinking of using existing demo's, but I have few queries about them. 1.The existing baremetal application,
  5. Hello Friends, I have Eclypse - Z7 and Zmod ADC 1410, my application only requires to capture 4-5 different types of signals and stores in it DDR, further transfer the same data to host PC. There are some signals for which I have to operate the ADC at lower sampling rate(compared to 100 MSPS) and I'm thinking to do that with Zmod only. However, I have gone through the Low level IP provided by Digilent and also through the AD9648 datasheet, and I found that ADC9648 has internal clock divider. I'm thinking of changing the integer value of clock divider (using IP) or provide low clock signal